ea63e2c358948287acf99c411d1821aa13bc1f61
It's easier to implement mips16 shift instructions if we're not
examining the opcode inside gen_shift_{imm,}. So move ROTR and ROTRV
and do the special-case handling of SRL and SRLV inside decode_opc.
Likewise for their 64-bit counterparts.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Read the documentation in qemu-doc.html. Fabrice Bellard.
Description
A QEMU emulator for legacy Apple devices
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