Compare commits
44
Commits
v1.2.1
...
stable-1.2
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029eae1a75 |
No files matched your search
@@ -739,7 +739,8 @@ int bdrv_open(BlockDriverState *bs, const char *filename, int flags,
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BlockDriver *drv)
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{
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int ret;
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char tmp_filename[PATH_MAX];
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/* TODO: extra byte is a hack to ensure MAX_PATH space on Windows. */
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char tmp_filename[PATH_MAX + 1];
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if (flags & BDRV_O_SNAPSHOT) {
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BlockDriverState *bs1;
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+77
-183
@@ -65,13 +65,6 @@ typedef struct IscsiAIOCB {
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#endif
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} IscsiAIOCB;
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struct IscsiTask {
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IscsiLun *iscsilun;
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BlockDriverState *bs;
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int status;
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int complete;
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};
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static void
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iscsi_bh_cb(void *p)
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{
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@@ -384,7 +377,7 @@ iscsi_aio_readv(BlockDriverState *bs, int64_t sector_num,
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*(uint16_t *)&acb->task->cdb[7] = htons(num_sectors);
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break;
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}
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if (iscsi_scsi_command_async(iscsi, iscsilun->lun, acb->task,
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iscsi_aio_read16_cb,
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NULL,
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@@ -669,163 +662,6 @@ iscsi_getlength(BlockDriverState *bs)
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return len;
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}
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static void
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iscsi_readcapacity16_cb(struct iscsi_context *iscsi, int status,
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void *command_data, void *opaque)
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{
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struct IscsiTask *itask = opaque;
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struct scsi_readcapacity16 *rc16;
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struct scsi_task *task = command_data;
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if (status != 0) {
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error_report("iSCSI: Failed to read capacity of iSCSI lun. %s",
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iscsi_get_error(iscsi));
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itask->status = 1;
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itask->complete = 1;
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scsi_free_scsi_task(task);
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return;
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}
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rc16 = scsi_datain_unmarshall(task);
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if (rc16 == NULL) {
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error_report("iSCSI: Failed to unmarshall readcapacity16 data.");
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itask->status = 1;
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itask->complete = 1;
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scsi_free_scsi_task(task);
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return;
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}
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itask->iscsilun->block_size = rc16->block_length;
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itask->iscsilun->num_blocks = rc16->returned_lba + 1;
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itask->bs->total_sectors = itask->iscsilun->num_blocks *
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itask->iscsilun->block_size / BDRV_SECTOR_SIZE ;
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itask->status = 0;
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itask->complete = 1;
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scsi_free_scsi_task(task);
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}
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static void
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iscsi_readcapacity10_cb(struct iscsi_context *iscsi, int status,
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void *command_data, void *opaque)
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{
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struct IscsiTask *itask = opaque;
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struct scsi_readcapacity10 *rc10;
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struct scsi_task *task = command_data;
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if (status != 0) {
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error_report("iSCSI: Failed to read capacity of iSCSI lun. %s",
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iscsi_get_error(iscsi));
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itask->status = 1;
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itask->complete = 1;
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scsi_free_scsi_task(task);
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return;
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}
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|
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rc10 = scsi_datain_unmarshall(task);
|
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if (rc10 == NULL) {
|
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error_report("iSCSI: Failed to unmarshall readcapacity10 data.");
|
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itask->status = 1;
|
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itask->complete = 1;
|
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scsi_free_scsi_task(task);
|
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return;
|
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}
|
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|
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itask->iscsilun->block_size = rc10->block_size;
|
||||
if (rc10->lba == 0) {
|
||||
/* blank disk loaded */
|
||||
itask->iscsilun->num_blocks = 0;
|
||||
} else {
|
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itask->iscsilun->num_blocks = rc10->lba + 1;
|
||||
}
|
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itask->bs->total_sectors = itask->iscsilun->num_blocks *
|
||||
itask->iscsilun->block_size / BDRV_SECTOR_SIZE ;
|
||||
|
||||
itask->status = 0;
|
||||
itask->complete = 1;
|
||||
scsi_free_scsi_task(task);
|
||||
}
|
||||
|
||||
static void
|
||||
iscsi_inquiry_cb(struct iscsi_context *iscsi, int status, void *command_data,
|
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void *opaque)
|
||||
{
|
||||
struct IscsiTask *itask = opaque;
|
||||
struct scsi_task *task = command_data;
|
||||
struct scsi_inquiry_standard *inq;
|
||||
|
||||
if (status != 0) {
|
||||
itask->status = 1;
|
||||
itask->complete = 1;
|
||||
scsi_free_scsi_task(task);
|
||||
return;
|
||||
}
|
||||
|
||||
inq = scsi_datain_unmarshall(task);
|
||||
if (inq == NULL) {
|
||||
error_report("iSCSI: Failed to unmarshall inquiry data.");
|
||||
itask->status = 1;
|
||||
itask->complete = 1;
|
||||
scsi_free_scsi_task(task);
|
||||
return;
|
||||
}
|
||||
|
||||
itask->iscsilun->type = inq->periperal_device_type;
|
||||
|
||||
scsi_free_scsi_task(task);
|
||||
|
||||
switch (itask->iscsilun->type) {
|
||||
case TYPE_DISK:
|
||||
task = iscsi_readcapacity16_task(iscsi, itask->iscsilun->lun,
|
||||
iscsi_readcapacity16_cb, opaque);
|
||||
if (task == NULL) {
|
||||
error_report("iSCSI: failed to send readcapacity16 command.");
|
||||
itask->status = 1;
|
||||
itask->complete = 1;
|
||||
return;
|
||||
}
|
||||
break;
|
||||
case TYPE_ROM:
|
||||
task = iscsi_readcapacity10_task(iscsi, itask->iscsilun->lun,
|
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0, 0,
|
||||
iscsi_readcapacity10_cb, opaque);
|
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if (task == NULL) {
|
||||
error_report("iSCSI: failed to send readcapacity16 command.");
|
||||
itask->status = 1;
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itask->complete = 1;
|
||||
return;
|
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}
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break;
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default:
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itask->status = 0;
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itask->complete = 1;
|
||||
}
|
||||
}
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static void
|
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iscsi_connect_cb(struct iscsi_context *iscsi, int status, void *command_data,
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void *opaque)
|
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{
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struct IscsiTask *itask = opaque;
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struct scsi_task *task;
|
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if (status != 0) {
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itask->status = 1;
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itask->complete = 1;
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return;
|
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}
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task = iscsi_inquiry_task(iscsi, itask->iscsilun->lun,
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0, 0, 36,
|
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iscsi_inquiry_cb, opaque);
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if (task == NULL) {
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error_report("iSCSI: failed to send inquiry command.");
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itask->status = 1;
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itask->complete = 1;
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return;
|
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}
|
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}
|
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static int parse_chap(struct iscsi_context *iscsi, const char *target)
|
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{
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QemuOptsList *list;
|
||||
@@ -938,7 +774,10 @@ static int iscsi_open(BlockDriverState *bs, const char *filename, int flags)
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IscsiLun *iscsilun = bs->opaque;
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struct iscsi_context *iscsi = NULL;
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struct iscsi_url *iscsi_url = NULL;
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struct IscsiTask task;
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struct scsi_task *task = NULL;
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struct scsi_inquiry_standard *inq = NULL;
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struct scsi_readcapacity10 *rc10 = NULL;
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struct scsi_readcapacity16 *rc16 = NULL;
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char *initiator_name = NULL;
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int ret;
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@@ -951,8 +790,7 @@ static int iscsi_open(BlockDriverState *bs, const char *filename, int flags)
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iscsi_url = iscsi_parse_full_url(iscsi, filename);
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if (iscsi_url == NULL) {
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error_report("Failed to parse URL : %s %s", filename,
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iscsi_get_error(iscsi));
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error_report("Failed to parse URL : %s", filename);
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ret = -EINVAL;
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goto out;
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}
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@@ -1002,33 +840,80 @@ static int iscsi_open(BlockDriverState *bs, const char *filename, int flags)
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/* check if we got HEADER_DIGEST via the options */
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parse_header_digest(iscsi, iscsi_url->target);
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task.iscsilun = iscsilun;
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task.status = 0;
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task.complete = 0;
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task.bs = bs;
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if (iscsi_full_connect_sync(iscsi, iscsi_url->portal, iscsi_url->lun) != 0) {
|
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error_report("iSCSI: Failed to connect to LUN : %s",
|
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iscsi_get_error(iscsi));
|
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ret = -EINVAL;
|
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goto out;
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}
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|
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iscsilun->iscsi = iscsi;
|
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iscsilun->lun = iscsi_url->lun;
|
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|
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if (iscsi_full_connect_async(iscsi, iscsi_url->portal, iscsi_url->lun,
|
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iscsi_connect_cb, &task)
|
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!= 0) {
|
||||
error_report("iSCSI: Failed to start async connect.");
|
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task = iscsi_inquiry_sync(iscsi, iscsilun->lun, 0, 0, 36);
|
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|
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if (task == NULL || task->status != SCSI_STATUS_GOOD) {
|
||||
error_report("iSCSI: failed to send inquiry command.");
|
||||
ret = -EINVAL;
|
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goto out;
|
||||
}
|
||||
|
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while (!task.complete) {
|
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iscsi_set_events(iscsilun);
|
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qemu_aio_wait();
|
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}
|
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if (task.status != 0) {
|
||||
error_report("iSCSI: Failed to connect to LUN : %s",
|
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iscsi_get_error(iscsi));
|
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inq = scsi_datain_unmarshall(task);
|
||||
if (inq == NULL) {
|
||||
error_report("iSCSI: Failed to unmarshall inquiry data.");
|
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ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
iscsilun->type = inq->periperal_device_type;
|
||||
|
||||
scsi_free_scsi_task(task);
|
||||
|
||||
switch (iscsilun->type) {
|
||||
case TYPE_DISK:
|
||||
task = iscsi_readcapacity16_sync(iscsi, iscsilun->lun);
|
||||
if (task == NULL || task->status != SCSI_STATUS_GOOD) {
|
||||
error_report("iSCSI: failed to send readcapacity16 command.");
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
rc16 = scsi_datain_unmarshall(task);
|
||||
if (rc16 == NULL) {
|
||||
error_report("iSCSI: Failed to unmarshall readcapacity16 data.");
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
iscsilun->block_size = rc16->block_length;
|
||||
iscsilun->num_blocks = rc16->returned_lba + 1;
|
||||
break;
|
||||
case TYPE_ROM:
|
||||
task = iscsi_readcapacity10_sync(iscsi, iscsilun->lun, 0, 0);
|
||||
if (task == NULL || task->status != SCSI_STATUS_GOOD) {
|
||||
error_report("iSCSI: failed to send readcapacity10 command.");
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
rc10 = scsi_datain_unmarshall(task);
|
||||
if (rc10 == NULL) {
|
||||
error_report("iSCSI: Failed to unmarshall readcapacity10 data.");
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
iscsilun->block_size = rc10->block_size;
|
||||
if (rc10->lba == 0) {
|
||||
/* blank disk loaded */
|
||||
iscsilun->num_blocks = 0;
|
||||
} else {
|
||||
iscsilun->num_blocks = rc10->lba + 1;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
bs->total_sectors = iscsilun->num_blocks *
|
||||
iscsilun->block_size / BDRV_SECTOR_SIZE ;
|
||||
|
||||
/* Medium changer or tape. We dont have any emulation for this so this must
|
||||
* be sg ioctl compatible. We force it to be sg, otherwise qemu will try
|
||||
* to read from the device to guess the image format.
|
||||
@@ -1047,6 +932,9 @@ out:
|
||||
if (iscsi_url != NULL) {
|
||||
iscsi_destroy_url(iscsi_url);
|
||||
}
|
||||
if (task != NULL) {
|
||||
scsi_free_scsi_task(task);
|
||||
}
|
||||
|
||||
if (ret) {
|
||||
if (iscsi != NULL) {
|
||||
@@ -1067,6 +955,11 @@ static void iscsi_close(BlockDriverState *bs)
|
||||
memset(iscsilun, 0, sizeof(IscsiLun));
|
||||
}
|
||||
|
||||
static int iscsi_has_zero_init(BlockDriverState *bs)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static BlockDriver bdrv_iscsi = {
|
||||
.format_name = "iscsi",
|
||||
.protocol_name = "iscsi",
|
||||
@@ -1082,6 +975,7 @@ static BlockDriver bdrv_iscsi = {
|
||||
.bdrv_aio_flush = iscsi_aio_flush,
|
||||
|
||||
.bdrv_aio_discard = iscsi_aio_discard,
|
||||
.bdrv_has_zero_init = iscsi_has_zero_init,
|
||||
|
||||
#ifdef __linux__
|
||||
.bdrv_ioctl = iscsi_ioctl,
|
||||
|
||||
@@ -301,7 +301,8 @@ static int alloc_refcount_block(BlockDriverState *bs,
|
||||
uint64_t last_table_size;
|
||||
uint64_t blocks_clusters;
|
||||
do {
|
||||
uint64_t table_clusters = size_to_clusters(s, table_size);
|
||||
uint64_t table_clusters =
|
||||
size_to_clusters(s, table_size * sizeof(uint64_t));
|
||||
blocks_clusters = 1 +
|
||||
((table_clusters + refcount_block_clusters - 1)
|
||||
/ refcount_block_clusters);
|
||||
|
||||
@@ -2389,8 +2389,7 @@ cat > $TMPC << EOF
|
||||
int main(void)
|
||||
{
|
||||
int pipefd[2];
|
||||
pipe2(pipefd, O_CLOEXEC);
|
||||
return 0;
|
||||
return pipe2(pipefd, O_CLOEXEC);
|
||||
}
|
||||
EOF
|
||||
if compile_prog "" "" ; then
|
||||
@@ -3191,7 +3190,7 @@ echo "sysconfdir=$sysconfdir" >> $config_host_mak
|
||||
echo "qemu_confdir=$qemu_confdir" >> $config_host_mak
|
||||
echo "qemu_datadir=$qemu_datadir" >> $config_host_mak
|
||||
echo "qemu_docdir=$qemu_docdir" >> $config_host_mak
|
||||
echo "CONFIG_QEMU_HELPERDIR=\"$libexecdir\"" >> $config_host_mak
|
||||
echo "qemu_helperdir=$libexecdir" >> $config_host_mak
|
||||
|
||||
echo "ARCH=$ARCH" >> $config_host_mak
|
||||
if test "$debug_tcg" = "yes" ; then
|
||||
|
||||
@@ -115,7 +115,7 @@ time_t mktimegm(struct tm *tm)
|
||||
m += 12;
|
||||
y--;
|
||||
}
|
||||
t = 86400 * (d + (153 * m - 457) / 5 + 365 * y + y / 4 - y / 100 +
|
||||
t = 86400ULL * (d + (153 * m - 457) / 5 + 365 * y + y / 4 - y / 100 +
|
||||
y / 400 - 719469);
|
||||
t += 3600 * tm->tm_hour + 60 * tm->tm_min + tm->tm_sec;
|
||||
return t;
|
||||
|
||||
@@ -6,7 +6,6 @@ CONFIG_M48T59=y
|
||||
CONFIG_PTIMER=y
|
||||
CONFIG_VGA=y
|
||||
CONFIG_VGA_PCI=y
|
||||
CONFIG_VGA_CIRRUS=y
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_PARALLEL=y
|
||||
CONFIG_PCKBD=y
|
||||
|
||||
+12
-5
@@ -59,6 +59,9 @@ static int debugflags = DBGBIT(TXERR) | DBGBIT(GENERAL);
|
||||
#define PNPMMIO_SIZE 0x20000
|
||||
#define MIN_BUF_SIZE 60 /* Min. octets in an ethernet frame sans FCS */
|
||||
|
||||
/* this is the size past which hardware will drop packets when setting LPE=0 */
|
||||
#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
|
||||
|
||||
/*
|
||||
* HW models:
|
||||
* E1000_DEV_ID_82540EM works with Windows and Linux
|
||||
@@ -92,7 +95,6 @@ typedef struct E1000State_st {
|
||||
|
||||
uint32_t rxbuf_size;
|
||||
uint32_t rxbuf_min_shift;
|
||||
int check_rxov;
|
||||
struct e1000_tx {
|
||||
unsigned char header[256];
|
||||
unsigned char vlan_header[4];
|
||||
@@ -741,11 +743,11 @@ static bool e1000_has_rxbufs(E1000State *s, size_t total_size)
|
||||
int bufs;
|
||||
/* Fast-path short packets */
|
||||
if (total_size <= s->rxbuf_size) {
|
||||
return s->mac_reg[RDH] != s->mac_reg[RDT] || !s->check_rxov;
|
||||
return s->mac_reg[RDH] != s->mac_reg[RDT];
|
||||
}
|
||||
if (s->mac_reg[RDH] < s->mac_reg[RDT]) {
|
||||
bufs = s->mac_reg[RDT] - s->mac_reg[RDH];
|
||||
} else if (s->mac_reg[RDH] > s->mac_reg[RDT] || !s->check_rxov) {
|
||||
} else if (s->mac_reg[RDH] > s->mac_reg[RDT]) {
|
||||
bufs = s->mac_reg[RDLEN] / sizeof(struct e1000_rx_desc) +
|
||||
s->mac_reg[RDT] - s->mac_reg[RDH];
|
||||
} else {
|
||||
@@ -796,6 +798,13 @@ e1000_receive(NetClientState *nc, const uint8_t *buf, size_t size)
|
||||
size = sizeof(min_buf);
|
||||
}
|
||||
|
||||
/* Discard oversized packets if !LPE and !SBP. */
|
||||
if (size > MAXIMUM_ETHERNET_VLAN_SIZE
|
||||
&& !(s->mac_reg[RCTL] & E1000_RCTL_LPE)
|
||||
&& !(s->mac_reg[RCTL] & E1000_RCTL_SBP)) {
|
||||
return size;
|
||||
}
|
||||
|
||||
if (!receive_filter(s, buf, size))
|
||||
return size;
|
||||
|
||||
@@ -848,7 +857,6 @@ e1000_receive(NetClientState *nc, const uint8_t *buf, size_t size)
|
||||
|
||||
if (++s->mac_reg[RDH] * sizeof(desc) >= s->mac_reg[RDLEN])
|
||||
s->mac_reg[RDH] = 0;
|
||||
s->check_rxov = 1;
|
||||
/* see comment in start_xmit; same here */
|
||||
if (s->mac_reg[RDH] == rdh_start) {
|
||||
DBGOUT(RXERR, "RDH wraparound @%x, RDT %x, RDLEN %x\n",
|
||||
@@ -925,7 +933,6 @@ mac_writereg(E1000State *s, int index, uint32_t val)
|
||||
static void
|
||||
set_rdt(E1000State *s, int index, uint32_t val)
|
||||
{
|
||||
s->check_rxov = 0;
|
||||
s->mac_reg[index] = val & 0xffff;
|
||||
if (e1000_has_rxbufs(s, 1)) {
|
||||
qemu_flush_queued_packets(&s->nic->nc);
|
||||
|
||||
+2
-1
@@ -860,7 +860,8 @@ void mips_malta_init (ram_addr_t ram_size,
|
||||
be = 0;
|
||||
#endif
|
||||
/* FPGA */
|
||||
malta_fpga_init(system_memory, FPGA_ADDRESS, env->irq[2], serial_hds[2]);
|
||||
/* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
|
||||
malta_fpga_init(system_memory, FPGA_ADDRESS, env->irq[4], serial_hds[2]);
|
||||
|
||||
/* Load firmware in flash / BIOS. */
|
||||
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
|
||||
|
||||
@@ -654,7 +654,7 @@ static void glue(nand_blk_write_, PAGE_SIZE)(NANDFlashState *s)
|
||||
sector = SECTOR(s->addr);
|
||||
off = (s->addr & PAGE_MASK) + s->offset;
|
||||
soff = SECTOR_OFFSET(s->addr);
|
||||
if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS) == -1) {
|
||||
if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS) < 0) {
|
||||
printf("%s: read error in sector %" PRIu64 "\n", __func__, sector);
|
||||
return;
|
||||
}
|
||||
@@ -666,21 +666,23 @@ static void glue(nand_blk_write_, PAGE_SIZE)(NANDFlashState *s)
|
||||
MIN(OOB_SIZE, off + s->iolen - PAGE_SIZE));
|
||||
}
|
||||
|
||||
if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS) == -1)
|
||||
if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS) < 0) {
|
||||
printf("%s: write error in sector %" PRIu64 "\n", __func__, sector);
|
||||
}
|
||||
} else {
|
||||
off = PAGE_START(s->addr) + (s->addr & PAGE_MASK) + s->offset;
|
||||
sector = off >> 9;
|
||||
soff = off & 0x1ff;
|
||||
if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) == -1) {
|
||||
if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) < 0) {
|
||||
printf("%s: read error in sector %" PRIu64 "\n", __func__, sector);
|
||||
return;
|
||||
}
|
||||
|
||||
mem_and(iobuf + soff, s->io, s->iolen);
|
||||
|
||||
if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) == -1)
|
||||
if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) < 0) {
|
||||
printf("%s: write error in sector %" PRIu64 "\n", __func__, sector);
|
||||
}
|
||||
}
|
||||
s->offset = 0;
|
||||
}
|
||||
@@ -704,31 +706,37 @@ static void glue(nand_blk_erase_, PAGE_SIZE)(NANDFlashState *s)
|
||||
i = SECTOR(addr);
|
||||
page = SECTOR(addr + (ADDR_SHIFT + s->erase_shift));
|
||||
for (; i < page; i ++)
|
||||
if (bdrv_write(s->bdrv, i, iobuf, 1) == -1)
|
||||
if (bdrv_write(s->bdrv, i, iobuf, 1) < 0) {
|
||||
printf("%s: write error in sector %" PRIu64 "\n", __func__, i);
|
||||
}
|
||||
} else {
|
||||
addr = PAGE_START(addr);
|
||||
page = addr >> 9;
|
||||
if (bdrv_read(s->bdrv, page, iobuf, 1) == -1)
|
||||
if (bdrv_read(s->bdrv, page, iobuf, 1) < 0) {
|
||||
printf("%s: read error in sector %" PRIu64 "\n", __func__, page);
|
||||
}
|
||||
memset(iobuf + (addr & 0x1ff), 0xff, (~addr & 0x1ff) + 1);
|
||||
if (bdrv_write(s->bdrv, page, iobuf, 1) == -1)
|
||||
if (bdrv_write(s->bdrv, page, iobuf, 1) < 0) {
|
||||
printf("%s: write error in sector %" PRIu64 "\n", __func__, page);
|
||||
}
|
||||
|
||||
memset(iobuf, 0xff, 0x200);
|
||||
i = (addr & ~0x1ff) + 0x200;
|
||||
for (addr += ((PAGE_SIZE + OOB_SIZE) << s->erase_shift) - 0x200;
|
||||
i < addr; i += 0x200)
|
||||
if (bdrv_write(s->bdrv, i >> 9, iobuf, 1) == -1)
|
||||
if (bdrv_write(s->bdrv, i >> 9, iobuf, 1) < 0) {
|
||||
printf("%s: write error in sector %" PRIu64 "\n",
|
||||
__func__, i >> 9);
|
||||
}
|
||||
|
||||
page = i >> 9;
|
||||
if (bdrv_read(s->bdrv, page, iobuf, 1) == -1)
|
||||
if (bdrv_read(s->bdrv, page, iobuf, 1) < 0) {
|
||||
printf("%s: read error in sector %" PRIu64 "\n", __func__, page);
|
||||
}
|
||||
memset(iobuf, 0xff, ((addr - 1) & 0x1ff) + 1);
|
||||
if (bdrv_write(s->bdrv, page, iobuf, 1) == -1)
|
||||
if (bdrv_write(s->bdrv, page, iobuf, 1) < 0) {
|
||||
printf("%s: write error in sector %" PRIu64 "\n", __func__, page);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -740,18 +748,20 @@ static void glue(nand_blk_load_, PAGE_SIZE)(NANDFlashState *s,
|
||||
|
||||
if (s->bdrv) {
|
||||
if (s->mem_oob) {
|
||||
if (bdrv_read(s->bdrv, SECTOR(addr), s->io, PAGE_SECTORS) == -1)
|
||||
if (bdrv_read(s->bdrv, SECTOR(addr), s->io, PAGE_SECTORS) < 0) {
|
||||
printf("%s: read error in sector %" PRIu64 "\n",
|
||||
__func__, SECTOR(addr));
|
||||
}
|
||||
memcpy(s->io + SECTOR_OFFSET(s->addr) + PAGE_SIZE,
|
||||
s->storage + (PAGE(s->addr) << OOB_SHIFT),
|
||||
OOB_SIZE);
|
||||
s->ioaddr = s->io + SECTOR_OFFSET(s->addr) + offset;
|
||||
} else {
|
||||
if (bdrv_read(s->bdrv, PAGE_START(addr) >> 9,
|
||||
s->io, (PAGE_SECTORS + 2)) == -1)
|
||||
s->io, (PAGE_SECTORS + 2)) < 0) {
|
||||
printf("%s: read error in sector %" PRIu64 "\n",
|
||||
__func__, PAGE_START(addr) >> 9);
|
||||
}
|
||||
s->ioaddr = s->io + (PAGE_START(addr) & 0x1ff) + offset;
|
||||
}
|
||||
} else {
|
||||
|
||||
+1
-1
@@ -351,7 +351,7 @@ static inline int onenand_erase(OneNANDState *s, int sec, int num)
|
||||
for (; num > 0; num--, sec++) {
|
||||
if (s->bdrv_cur) {
|
||||
int erasesec = s->secs_cur + (sec >> 5);
|
||||
if (bdrv_write(s->bdrv_cur, sec, blankbuf, 1)) {
|
||||
if (bdrv_write(s->bdrv_cur, sec, blankbuf, 1) < 0) {
|
||||
goto fail;
|
||||
}
|
||||
if (bdrv_read(s->bdrv_cur, erasesec, tmpbuf, 1) < 0) {
|
||||
|
||||
+7
-1
@@ -80,7 +80,13 @@ static int scsi_hot_add(Monitor *mon, DeviceState *adapter,
|
||||
SCSIBus *scsibus;
|
||||
SCSIDevice *scsidev;
|
||||
|
||||
scsibus = SCSI_BUS(QLIST_FIRST(&adapter->child_bus));
|
||||
scsibus = (SCSIBus *)
|
||||
object_dynamic_cast(OBJECT(QLIST_FIRST(&adapter->child_bus)),
|
||||
TYPE_SCSI_BUS);
|
||||
if (!scsibus) {
|
||||
error_report("Device is not a SCSI adapter");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
* drive_init() tries to find a default for dinfo->unit. Doesn't
|
||||
|
||||
+1
-1
@@ -59,7 +59,7 @@ static int bamboo_load_device_tree(target_phys_addr_t addr,
|
||||
{
|
||||
int ret = -1;
|
||||
#ifdef CONFIG_FDT
|
||||
uint32_t mem_reg_property[] = { 0, 0, ramsize };
|
||||
uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(ramsize) };
|
||||
char *filename;
|
||||
int fdt_size;
|
||||
void *fdt;
|
||||
|
||||
@@ -99,7 +99,6 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
|
||||
{
|
||||
VGACommonState *vga = &qxl->vga;
|
||||
int i;
|
||||
DisplaySurface *surface = vga->ds->surface;
|
||||
|
||||
if (qxl->guest_primary.resized) {
|
||||
qxl->guest_primary.resized = 0;
|
||||
@@ -112,9 +111,6 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
|
||||
qxl->guest_primary.qxl_stride,
|
||||
qxl->guest_primary.bytes_pp,
|
||||
qxl->guest_primary.bits_pp);
|
||||
}
|
||||
if (surface->width != qxl->guest_primary.surface.width ||
|
||||
surface->height != qxl->guest_primary.surface.height) {
|
||||
if (qxl->guest_primary.qxl_stride > 0) {
|
||||
qemu_free_displaysurface(vga->ds);
|
||||
qemu_create_displaysurface_from(qxl->guest_primary.surface.width,
|
||||
|
||||
@@ -1703,7 +1703,7 @@ static void qxl_hw_text_update(void *opaque, console_ch_t *chardata)
|
||||
|
||||
static void qxl_dirty_surfaces(PCIQXLDevice *qxl)
|
||||
{
|
||||
intptr_t vram_start;
|
||||
uintptr_t vram_start;
|
||||
int i;
|
||||
|
||||
if (qxl->mode != QXL_MODE_NATIVE && qxl->mode != QXL_MODE_COMPAT) {
|
||||
@@ -1714,7 +1714,7 @@ static void qxl_dirty_surfaces(PCIQXLDevice *qxl)
|
||||
qxl_set_dirty(&qxl->vga.vram, qxl->shadow_rom.draw_area_offset,
|
||||
qxl->shadow_rom.surface0_area_size);
|
||||
|
||||
vram_start = (intptr_t)memory_region_get_ram_ptr(&qxl->vram_bar);
|
||||
vram_start = (uintptr_t)memory_region_get_ram_ptr(&qxl->vram_bar);
|
||||
|
||||
/* dirty the off-screen surfaces */
|
||||
for (i = 0; i < NUM_SURFACES; i++) {
|
||||
@@ -2042,6 +2042,7 @@ static int qxl_post_load(void *opaque, int version)
|
||||
|
||||
switch (newmode) {
|
||||
case QXL_MODE_UNDEFINED:
|
||||
qxl_create_memslots(d);
|
||||
break;
|
||||
case QXL_MODE_VGA:
|
||||
qxl_create_memslots(d);
|
||||
|
||||
+2
-2
@@ -284,8 +284,8 @@ static void s390_init(ram_addr_t my_ram_size,
|
||||
}
|
||||
|
||||
/* we have to overwrite values in the kernel image, which are "rom" */
|
||||
memcpy(rom_ptr(INITRD_PARM_START), &initrd_offset, 8);
|
||||
memcpy(rom_ptr(INITRD_PARM_SIZE), &initrd_size, 8);
|
||||
stq_p(rom_ptr(INITRD_PARM_START), initrd_offset);
|
||||
stq_p(rom_ptr(INITRD_PARM_SIZE), initrd_size);
|
||||
}
|
||||
|
||||
if (rom_ptr(KERN_PARM_AREA)) {
|
||||
|
||||
@@ -1407,7 +1407,7 @@ static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len)
|
||||
|
||||
DPRINTF("sd_blk_read: addr = 0x%08llx, len = %d\n",
|
||||
(unsigned long long) addr, len);
|
||||
if (!sd->bdrv || bdrv_read(sd->bdrv, addr >> 9, sd->buf, 1) == -1) {
|
||||
if (!sd->bdrv || bdrv_read(sd->bdrv, addr >> 9, sd->buf, 1) < 0) {
|
||||
fprintf(stderr, "sd_blk_read: read error on host side\n");
|
||||
return;
|
||||
}
|
||||
@@ -1415,7 +1415,7 @@ static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len)
|
||||
if (end > (addr & ~511) + 512) {
|
||||
memcpy(sd->data, sd->buf + (addr & 511), 512 - (addr & 511));
|
||||
|
||||
if (bdrv_read(sd->bdrv, end >> 9, sd->buf, 1) == -1) {
|
||||
if (bdrv_read(sd->bdrv, end >> 9, sd->buf, 1) < 0) {
|
||||
fprintf(stderr, "sd_blk_read: read error on host side\n");
|
||||
return;
|
||||
}
|
||||
@@ -1429,29 +1429,31 @@ static void sd_blk_write(SDState *sd, uint64_t addr, uint32_t len)
|
||||
uint64_t end = addr + len;
|
||||
|
||||
if ((addr & 511) || len < 512)
|
||||
if (!sd->bdrv || bdrv_read(sd->bdrv, addr >> 9, sd->buf, 1) == -1) {
|
||||
if (!sd->bdrv || bdrv_read(sd->bdrv, addr >> 9, sd->buf, 1) < 0) {
|
||||
fprintf(stderr, "sd_blk_write: read error on host side\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (end > (addr & ~511) + 512) {
|
||||
memcpy(sd->buf + (addr & 511), sd->data, 512 - (addr & 511));
|
||||
if (bdrv_write(sd->bdrv, addr >> 9, sd->buf, 1) == -1) {
|
||||
if (bdrv_write(sd->bdrv, addr >> 9, sd->buf, 1) < 0) {
|
||||
fprintf(stderr, "sd_blk_write: write error on host side\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (bdrv_read(sd->bdrv, end >> 9, sd->buf, 1) == -1) {
|
||||
if (bdrv_read(sd->bdrv, end >> 9, sd->buf, 1) < 0) {
|
||||
fprintf(stderr, "sd_blk_write: read error on host side\n");
|
||||
return;
|
||||
}
|
||||
memcpy(sd->buf, sd->data + 512 - (addr & 511), end & 511);
|
||||
if (bdrv_write(sd->bdrv, end >> 9, sd->buf, 1) == -1)
|
||||
if (bdrv_write(sd->bdrv, end >> 9, sd->buf, 1) < 0) {
|
||||
fprintf(stderr, "sd_blk_write: write error on host side\n");
|
||||
}
|
||||
} else {
|
||||
memcpy(sd->buf + (addr & 511), sd->data, len);
|
||||
if (!sd->bdrv || bdrv_write(sd->bdrv, addr >> 9, sd->buf, 1) == -1)
|
||||
if (!sd->bdrv || bdrv_write(sd->bdrv, addr >> 9, sd->buf, 1) < 0) {
|
||||
fprintf(stderr, "sd_blk_write: write error on host side\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -585,6 +585,13 @@ USBDevice *usbdevice_create(const char *cmdline)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (!bus) {
|
||||
error_report("Error: no usb bus to attach usbdevice %s, "
|
||||
"please try -machine usb=on and check that "
|
||||
"the machine model supports USB", driver);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (!f->usbdevice_init) {
|
||||
if (*params) {
|
||||
error_report("usbdevice %s accepts no params", driver);
|
||||
|
||||
+9
-1
@@ -826,8 +826,16 @@ static int uhci_handle_td(UHCIState *s, uint32_t addr, UHCI_TD *td,
|
||||
USBEndpoint *ep;
|
||||
|
||||
/* Is active ? */
|
||||
if (!(td->ctrl & TD_CTRL_ACTIVE))
|
||||
if (!(td->ctrl & TD_CTRL_ACTIVE)) {
|
||||
/*
|
||||
* ehci11d spec page 22: "Even if the Active bit in the TD is already
|
||||
* cleared when the TD is fetched ... an IOC interrupt is generated"
|
||||
*/
|
||||
if (td->ctrl & TD_CTRL_IOC) {
|
||||
*int_mask |= 0x01;
|
||||
}
|
||||
return TD_RESULT_NEXT_QH;
|
||||
}
|
||||
|
||||
async = uhci_async_find_td(s, addr, td);
|
||||
if (async) {
|
||||
|
||||
+2
-2
@@ -2098,7 +2098,7 @@ static uint32_t xhci_cap_read(XHCIState *xhci, uint32_t reg)
|
||||
ret = 0x02000402; /* USB 2.0 */
|
||||
break;
|
||||
case 0x24: /* Supported Protocol:04 */
|
||||
ret = 0x20425455; /* "USB " */
|
||||
ret = 0x20425355; /* "USB " */
|
||||
break;
|
||||
case 0x28: /* Supported Protocol:08 */
|
||||
ret = 0x00000001 | (USB2_PORTS<<8);
|
||||
@@ -2110,7 +2110,7 @@ static uint32_t xhci_cap_read(XHCIState *xhci, uint32_t reg)
|
||||
ret = 0x03000002; /* USB 3.0 */
|
||||
break;
|
||||
case 0x34: /* Supported Protocol:04 */
|
||||
ret = 0x20425455; /* "USB " */
|
||||
ret = 0x20425355; /* "USB " */
|
||||
break;
|
||||
case 0x38: /* Supported Protocol:08 */
|
||||
ret = 0x00000000 | (USB2_PORTS+1) | (USB3_PORTS<<8);
|
||||
|
||||
+7
-5
@@ -424,15 +424,17 @@ static void virtio_scsi_command_complete(SCSIRequest *r, uint32_t status,
|
||||
size_t resid)
|
||||
{
|
||||
VirtIOSCSIReq *req = r->hba_private;
|
||||
uint32_t sense_len;
|
||||
|
||||
req->resp.cmd->response = VIRTIO_SCSI_S_OK;
|
||||
req->resp.cmd->status = status;
|
||||
if (req->resp.cmd->status == GOOD) {
|
||||
req->resp.cmd->resid = resid;
|
||||
req->resp.cmd->resid = tswap32(resid);
|
||||
} else {
|
||||
req->resp.cmd->resid = 0;
|
||||
req->resp.cmd->sense_len =
|
||||
scsi_req_get_sense(r, req->resp.cmd->sense, VIRTIO_SCSI_SENSE_SIZE);
|
||||
sense_len = scsi_req_get_sense(r, req->resp.cmd->sense,
|
||||
VIRTIO_SCSI_SENSE_SIZE);
|
||||
req->resp.cmd->sense_len = tswap32(sense_len);
|
||||
}
|
||||
virtio_scsi_complete_req(req);
|
||||
}
|
||||
@@ -532,8 +534,8 @@ static void virtio_scsi_get_config(VirtIODevice *vdev,
|
||||
stl_raw(&scsiconf->event_info_size, sizeof(VirtIOSCSIEvent));
|
||||
stl_raw(&scsiconf->sense_size, s->sense_size);
|
||||
stl_raw(&scsiconf->cdb_size, s->cdb_size);
|
||||
stl_raw(&scsiconf->max_channel, VIRTIO_SCSI_MAX_CHANNEL);
|
||||
stl_raw(&scsiconf->max_target, VIRTIO_SCSI_MAX_TARGET);
|
||||
stw_raw(&scsiconf->max_channel, VIRTIO_SCSI_MAX_CHANNEL);
|
||||
stw_raw(&scsiconf->max_target, VIRTIO_SCSI_MAX_TARGET);
|
||||
stl_raw(&scsiconf->max_lun, VIRTIO_SCSI_MAX_LUN);
|
||||
}
|
||||
|
||||
|
||||
@@ -42,7 +42,7 @@ static inline void ratelimit_set_speed(RateLimit *limit, uint64_t speed,
|
||||
uint64_t slice_ns)
|
||||
{
|
||||
limit->slice_ns = slice_ns;
|
||||
limit->slice_quota = ((double)speed * 1000000000ULL) / slice_ns;
|
||||
limit->slice_quota = ((double)speed * slice_ns)/1000000000ULL;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -538,12 +538,12 @@ static void render_memory_region(FlatView *view,
|
||||
offset_in_region += int128_get64(now);
|
||||
int128_subfrom(&remain, now);
|
||||
}
|
||||
if (int128_eq(base, view->ranges[i].addr.start)) {
|
||||
now = int128_min(remain, view->ranges[i].addr.size);
|
||||
int128_addto(&base, now);
|
||||
offset_in_region += int128_get64(now);
|
||||
int128_subfrom(&remain, now);
|
||||
}
|
||||
now = int128_sub(int128_min(int128_add(base, remain),
|
||||
addrrange_end(view->ranges[i].addr)),
|
||||
base);
|
||||
int128_addto(&base, now);
|
||||
offset_in_region += int128_get64(now);
|
||||
int128_subfrom(&remain, now);
|
||||
}
|
||||
if (int128_nz(remain)) {
|
||||
fr.mr = mr;
|
||||
|
||||
@@ -399,24 +399,23 @@ int nbd_init(int fd, int csock, uint32_t flags, off_t size, size_t blocksize)
|
||||
return -serrno;
|
||||
}
|
||||
|
||||
if (flags & NBD_FLAG_READ_ONLY) {
|
||||
int read_only = 1;
|
||||
TRACE("Setting readonly attribute");
|
||||
if (ioctl(fd, NBD_SET_FLAGS, flags) < 0) {
|
||||
if (errno == ENOTTY) {
|
||||
int read_only = (flags & NBD_FLAG_READ_ONLY) != 0;
|
||||
TRACE("Setting readonly attribute");
|
||||
|
||||
if (ioctl(fd, BLKROSET, (unsigned long) &read_only) < 0) {
|
||||
if (ioctl(fd, BLKROSET, (unsigned long) &read_only) < 0) {
|
||||
int serrno = errno;
|
||||
LOG("Failed setting read-only attribute");
|
||||
return -serrno;
|
||||
}
|
||||
} else {
|
||||
int serrno = errno;
|
||||
LOG("Failed setting read-only attribute");
|
||||
LOG("Failed setting flags");
|
||||
return -serrno;
|
||||
}
|
||||
}
|
||||
|
||||
if (ioctl(fd, NBD_SET_FLAGS, flags) < 0
|
||||
&& errno != ENOTTY) {
|
||||
int serrno = errno;
|
||||
LOG("Failed setting flags");
|
||||
return -serrno;
|
||||
}
|
||||
|
||||
TRACE("Negotiation ended");
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -132,6 +132,11 @@ static void qapi_dealloc_type_number(Visitor *v, double *obj, const char *name,
|
||||
{
|
||||
}
|
||||
|
||||
static void qapi_dealloc_type_size(Visitor *v, uint64_t *obj, const char *name,
|
||||
Error **errp)
|
||||
{
|
||||
}
|
||||
|
||||
static void qapi_dealloc_type_enum(Visitor *v, int *obj, const char *strings[],
|
||||
const char *kind, const char *name,
|
||||
Error **errp)
|
||||
@@ -164,6 +169,7 @@ QapiDeallocVisitor *qapi_dealloc_visitor_new(void)
|
||||
v->visitor.type_bool = qapi_dealloc_type_bool;
|
||||
v->visitor.type_str = qapi_dealloc_type_str;
|
||||
v->visitor.type_number = qapi_dealloc_type_number;
|
||||
v->visitor.type_size = qapi_dealloc_type_size;
|
||||
|
||||
QTAILQ_INIT(&v->stack);
|
||||
|
||||
|
||||
+1
-2
@@ -1698,14 +1698,13 @@ int main(int argc, char **argv)
|
||||
|
||||
error_set_progname(argv[0]);
|
||||
|
||||
qemu_init_main_loop();
|
||||
bdrv_init();
|
||||
if (argc < 2)
|
||||
help();
|
||||
cmdname = argv[1];
|
||||
argc--; argv++;
|
||||
|
||||
qemu_init_main_loop();
|
||||
|
||||
/* find the command */
|
||||
for(cmd = img_cmds; cmd->name != NULL; cmd++) {
|
||||
if (!strcmp(cmdname, cmd->name)) {
|
||||
|
||||
@@ -1892,9 +1892,8 @@ int main(int argc, char **argv)
|
||||
exit(1);
|
||||
}
|
||||
|
||||
bdrv_init();
|
||||
|
||||
qemu_init_main_loop();
|
||||
bdrv_init();
|
||||
|
||||
/* initialize commands */
|
||||
quit_init();
|
||||
|
||||
+3
-3
@@ -307,6 +307,7 @@ void object_initialize_with_type(void *data, TypeImpl *type)
|
||||
|
||||
memset(obj, 0, type->instance_size);
|
||||
obj->class = type->class;
|
||||
object_ref(obj);
|
||||
QTAILQ_INIT(&obj->properties);
|
||||
object_init_with_type(obj, type);
|
||||
}
|
||||
@@ -395,7 +396,6 @@ Object *object_new_with_type(Type type)
|
||||
|
||||
obj = g_malloc(type->instance_size);
|
||||
object_initialize_with_type(obj, type);
|
||||
object_ref(obj);
|
||||
|
||||
return obj;
|
||||
}
|
||||
@@ -417,7 +417,7 @@ void object_delete(Object *obj)
|
||||
|
||||
Object *object_dynamic_cast(Object *obj, const char *typename)
|
||||
{
|
||||
if (object_class_dynamic_cast(object_get_class(obj), typename)) {
|
||||
if (obj && object_class_dynamic_cast(object_get_class(obj), typename)) {
|
||||
return obj;
|
||||
}
|
||||
|
||||
@@ -430,7 +430,7 @@ Object *object_dynamic_cast_assert(Object *obj, const char *typename)
|
||||
|
||||
inst = object_dynamic_cast(obj, typename);
|
||||
|
||||
if (!inst) {
|
||||
if (!inst && obj) {
|
||||
fprintf(stderr, "Object %p is not an instance of type %s\n",
|
||||
obj, typename);
|
||||
abort();
|
||||
|
||||
+1
-1
@@ -846,7 +846,7 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, void *opaque,
|
||||
{
|
||||
X86CPU *cpu = X86_CPU(obj);
|
||||
const int64_t min = 0;
|
||||
const int64_t max = INT_MAX;
|
||||
const int64_t max = INT64_MAX;
|
||||
int64_t value;
|
||||
|
||||
visit_type_int(v, &value, name, errp);
|
||||
|
||||
@@ -150,7 +150,7 @@ static void m68k_semi_cb(CPUM68KState *env, target_ulong ret, target_ulong err)
|
||||
}
|
||||
/* FIXME - handle put_user() failure */
|
||||
put_user_u32(ret, args);
|
||||
put_user_u32(errno, args + 4);
|
||||
put_user_u32(err, args + 4);
|
||||
}
|
||||
|
||||
#define ARG(n) \
|
||||
|
||||
@@ -9486,7 +9486,7 @@ enum {
|
||||
|
||||
/* bits 13..12 for 0x32 */
|
||||
MULT_ACC = 0x0,
|
||||
MULTU_ACC = 0x0,
|
||||
MULTU_ACC = 0x1,
|
||||
|
||||
/* bits 15..12 for 0x2c */
|
||||
SEB = 0x2,
|
||||
|
||||
@@ -89,24 +89,6 @@ enum {
|
||||
/* Interrupt */
|
||||
#define NR_IRQS 32
|
||||
|
||||
/* Registers */
|
||||
enum {
|
||||
R0 = 0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10,
|
||||
R11, R12, R13, R14, R15, R16, R17, R18, R19, R20,
|
||||
R21, R22, R23, R24, R25, R26, R27, R28, R29, R30,
|
||||
R31
|
||||
};
|
||||
|
||||
/* Register aliases */
|
||||
enum {
|
||||
R_ZERO = R0,
|
||||
R_SP = R1,
|
||||
R_FP = R2,
|
||||
R_LR = R9,
|
||||
R_RV = R11,
|
||||
R_RVH = R12
|
||||
};
|
||||
|
||||
/* Unit presece register */
|
||||
enum {
|
||||
UPR_UP = (1 << 0),
|
||||
|
||||
@@ -3466,7 +3466,8 @@ static inline void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
|
||||
if (unlikely(ctx->singlestep_enabled)) {
|
||||
if ((ctx->singlestep_enabled &
|
||||
(CPU_BRANCH_STEP | CPU_SINGLE_STEP)) &&
|
||||
ctx->exception == POWERPC_EXCP_BRANCH) {
|
||||
(ctx->exception == POWERPC_EXCP_BRANCH ||
|
||||
ctx->exception == POWERPC_EXCP_TRACE)) {
|
||||
target_ulong tmp = ctx->nip;
|
||||
ctx->nip = dest;
|
||||
gen_exception(ctx, POWERPC_EXCP_TRACE);
|
||||
|
||||
+60
-38
@@ -602,6 +602,22 @@ static inline void tcg_out_bswap16(TCGContext *s, int cond, int rd, int rn)
|
||||
}
|
||||
}
|
||||
|
||||
/* swap the two low bytes assuming that the two high input bytes and the
|
||||
two high output bit can hold any value. */
|
||||
static inline void tcg_out_bswap16st(TCGContext *s, int cond, int rd, int rn)
|
||||
{
|
||||
if (use_armv6_instructions) {
|
||||
/* rev16 */
|
||||
tcg_out32(s, 0x06bf0fb0 | (cond << 28) | (rd << 12) | rn);
|
||||
} else {
|
||||
tcg_out_dat_reg(s, cond, ARITH_MOV,
|
||||
TCG_REG_R8, 0, rn, SHIFT_IMM_LSR(8));
|
||||
tcg_out_dat_imm(s, cond, ARITH_AND, TCG_REG_R8, TCG_REG_R8, 0xff);
|
||||
tcg_out_dat_reg(s, cond, ARITH_ORR,
|
||||
rd, TCG_REG_R8, rn, SHIFT_IMM_LSL(8));
|
||||
}
|
||||
}
|
||||
|
||||
static inline void tcg_out_bswap32(TCGContext *s, int cond, int rd, int rn)
|
||||
{
|
||||
if (use_armv6_instructions) {
|
||||
@@ -630,6 +646,22 @@ static inline void tcg_out_ld32_12(TCGContext *s, int cond,
|
||||
(rn << 16) | (rd << 12) | ((-im) & 0xfff));
|
||||
}
|
||||
|
||||
/* Offset pre-increment with base writeback. */
|
||||
static inline void tcg_out_ld32_12wb(TCGContext *s, int cond,
|
||||
int rd, int rn, tcg_target_long im)
|
||||
{
|
||||
/* ldr with writeback and both register equals is UNPREDICTABLE */
|
||||
assert(rd != rn);
|
||||
|
||||
if (im >= 0) {
|
||||
tcg_out32(s, (cond << 28) | 0x05b00000 |
|
||||
(rn << 16) | (rd << 12) | (im & 0xfff));
|
||||
} else {
|
||||
tcg_out32(s, (cond << 28) | 0x05300000 |
|
||||
(rn << 16) | (rd << 12) | ((-im) & 0xfff));
|
||||
}
|
||||
}
|
||||
|
||||
static inline void tcg_out_st32_12(TCGContext *s, int cond,
|
||||
int rd, int rn, tcg_target_long im)
|
||||
{
|
||||
@@ -1062,7 +1094,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
|
||||
{
|
||||
int addr_reg, data_reg, data_reg2, bswap;
|
||||
#ifdef CONFIG_SOFTMMU
|
||||
int mem_index, s_bits;
|
||||
int mem_index, s_bits, tlb_offset;
|
||||
TCGReg argreg;
|
||||
# if TARGET_LONG_BITS == 64
|
||||
int addr_reg2;
|
||||
@@ -1102,19 +1134,15 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
|
||||
TCG_REG_R0, TCG_REG_R8, CPU_TLB_SIZE - 1);
|
||||
tcg_out_dat_reg(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_AREG0,
|
||||
TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
|
||||
/* In the
|
||||
* ldr r1 [r0, #(offsetof(CPUArchState, tlb_table[mem_index][0].addr_read))]
|
||||
* below, the offset is likely to exceed 12 bits if mem_index != 0 and
|
||||
* not exceed otherwise, so use an
|
||||
* add r0, r0, #(mem_index * sizeof *CPUArchState.tlb_table)
|
||||
* before.
|
||||
*/
|
||||
if (mem_index)
|
||||
/* We assume that the offset is contained within 20 bits. */
|
||||
tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read);
|
||||
assert(tlb_offset & ~0xfffff == 0);
|
||||
if (tlb_offset > 0xfff) {
|
||||
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
|
||||
(mem_index << (TLB_SHIFT & 1)) |
|
||||
((16 - (TLB_SHIFT >> 1)) << 8));
|
||||
tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R0,
|
||||
offsetof(CPUArchState, tlb_table[0][0].addr_read));
|
||||
0xa00 | (tlb_offset >> 12));
|
||||
tlb_offset &= 0xfff;
|
||||
}
|
||||
tcg_out_ld32_12wb(s, COND_AL, TCG_REG_R1, TCG_REG_R0, tlb_offset);
|
||||
tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R1,
|
||||
TCG_REG_R8, SHIFT_IMM_LSL(TARGET_PAGE_BITS));
|
||||
/* Check alignment. */
|
||||
@@ -1122,15 +1150,14 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
|
||||
tcg_out_dat_imm(s, COND_EQ, ARITH_TST,
|
||||
0, addr_reg, (1 << s_bits) - 1);
|
||||
# if TARGET_LONG_BITS == 64
|
||||
/* XXX: possibly we could use a block data load or writeback in
|
||||
* the first access. */
|
||||
tcg_out_ld32_12(s, COND_EQ, TCG_REG_R1, TCG_REG_R0,
|
||||
offsetof(CPUArchState, tlb_table[0][0].addr_read) + 4);
|
||||
/* XXX: possibly we could use a block data load in the first access. */
|
||||
tcg_out_ld32_12(s, COND_EQ, TCG_REG_R1, TCG_REG_R0, 4);
|
||||
tcg_out_dat_reg(s, COND_EQ, ARITH_CMP, 0,
|
||||
TCG_REG_R1, addr_reg2, SHIFT_IMM_LSL(0));
|
||||
# endif
|
||||
tcg_out_ld32_12(s, COND_EQ, TCG_REG_R1, TCG_REG_R0,
|
||||
offsetof(CPUArchState, tlb_table[0][0].addend));
|
||||
offsetof(CPUTLBEntry, addend)
|
||||
- offsetof(CPUTLBEntry, addr_read));
|
||||
|
||||
switch (opc) {
|
||||
case 0:
|
||||
@@ -1288,7 +1315,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
|
||||
{
|
||||
int addr_reg, data_reg, data_reg2, bswap;
|
||||
#ifdef CONFIG_SOFTMMU
|
||||
int mem_index, s_bits;
|
||||
int mem_index, s_bits, tlb_offset;
|
||||
TCGReg argreg;
|
||||
# if TARGET_LONG_BITS == 64
|
||||
int addr_reg2;
|
||||
@@ -1325,19 +1352,15 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
|
||||
TCG_REG_R0, TCG_REG_R8, CPU_TLB_SIZE - 1);
|
||||
tcg_out_dat_reg(s, COND_AL, ARITH_ADD, TCG_REG_R0,
|
||||
TCG_AREG0, TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
|
||||
/* In the
|
||||
* ldr r1 [r0, #(offsetof(CPUArchState, tlb_table[mem_index][0].addr_write))]
|
||||
* below, the offset is likely to exceed 12 bits if mem_index != 0 and
|
||||
* not exceed otherwise, so use an
|
||||
* add r0, r0, #(mem_index * sizeof *CPUArchState.tlb_table)
|
||||
* before.
|
||||
*/
|
||||
if (mem_index)
|
||||
/* We assume that the offset is contained within 20 bits. */
|
||||
tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
|
||||
assert(tlb_offset & ~0xfffff == 0);
|
||||
if (tlb_offset > 0xfff) {
|
||||
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
|
||||
(mem_index << (TLB_SHIFT & 1)) |
|
||||
((16 - (TLB_SHIFT >> 1)) << 8));
|
||||
tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R0,
|
||||
offsetof(CPUArchState, tlb_table[0][0].addr_write));
|
||||
0xa00 | (tlb_offset >> 12));
|
||||
tlb_offset &= 0xfff;
|
||||
}
|
||||
tcg_out_ld32_12wb(s, COND_AL, TCG_REG_R1, TCG_REG_R0, tlb_offset);
|
||||
tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R1,
|
||||
TCG_REG_R8, SHIFT_IMM_LSL(TARGET_PAGE_BITS));
|
||||
/* Check alignment. */
|
||||
@@ -1345,15 +1368,14 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
|
||||
tcg_out_dat_imm(s, COND_EQ, ARITH_TST,
|
||||
0, addr_reg, (1 << s_bits) - 1);
|
||||
# if TARGET_LONG_BITS == 64
|
||||
/* XXX: possibly we could use a block data load or writeback in
|
||||
* the first access. */
|
||||
tcg_out_ld32_12(s, COND_EQ, TCG_REG_R1, TCG_REG_R0,
|
||||
offsetof(CPUArchState, tlb_table[0][0].addr_write) + 4);
|
||||
/* XXX: possibly we could use a block data load in the first access. */
|
||||
tcg_out_ld32_12(s, COND_EQ, TCG_REG_R1, TCG_REG_R0, 4);
|
||||
tcg_out_dat_reg(s, COND_EQ, ARITH_CMP, 0,
|
||||
TCG_REG_R1, addr_reg2, SHIFT_IMM_LSL(0));
|
||||
# endif
|
||||
tcg_out_ld32_12(s, COND_EQ, TCG_REG_R1, TCG_REG_R0,
|
||||
offsetof(CPUArchState, tlb_table[0][0].addend));
|
||||
offsetof(CPUTLBEntry, addend)
|
||||
- offsetof(CPUTLBEntry, addr_write));
|
||||
|
||||
switch (opc) {
|
||||
case 0:
|
||||
@@ -1361,7 +1383,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
|
||||
break;
|
||||
case 1:
|
||||
if (bswap) {
|
||||
tcg_out_bswap16(s, COND_EQ, TCG_REG_R0, data_reg);
|
||||
tcg_out_bswap16st(s, COND_EQ, TCG_REG_R0, data_reg);
|
||||
tcg_out_st16_r(s, COND_EQ, TCG_REG_R0, addr_reg, TCG_REG_R1);
|
||||
} else {
|
||||
tcg_out_st16_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
|
||||
@@ -1447,7 +1469,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
|
||||
break;
|
||||
case 1:
|
||||
if (bswap) {
|
||||
tcg_out_bswap16(s, COND_AL, TCG_REG_R0, data_reg);
|
||||
tcg_out_bswap16st(s, COND_AL, TCG_REG_R0, data_reg);
|
||||
tcg_out_st16_8(s, COND_AL, TCG_REG_R0, addr_reg, 0);
|
||||
} else {
|
||||
tcg_out_st16_8(s, COND_AL, data_reg, addr_reg, 0);
|
||||
|
||||
@@ -338,9 +338,9 @@ static uint64_t tci_read_ri64(uint8_t **tb_ptr)
|
||||
}
|
||||
#endif
|
||||
|
||||
static target_ulong tci_read_label(uint8_t **tb_ptr)
|
||||
static tcg_target_ulong tci_read_label(uint8_t **tb_ptr)
|
||||
{
|
||||
target_ulong label = tci_read_i(tb_ptr);
|
||||
tcg_target_ulong label = tci_read_i(tb_ptr);
|
||||
assert(label != 0);
|
||||
return label;
|
||||
}
|
||||
|
||||
@@ -179,6 +179,50 @@ static void check_time(int wiggle)
|
||||
|
||||
static int wiggle = 2;
|
||||
|
||||
static void set_year(void)
|
||||
{
|
||||
/* Set BCD mode */
|
||||
cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) & ~REG_B_DM);
|
||||
cmos_write(RTC_REG_A, 0x76);
|
||||
cmos_write(RTC_YEAR, 0x11);
|
||||
cmos_write(RTC_MONTH, 0x02);
|
||||
cmos_write(RTC_DAY_OF_MONTH, 0x02);
|
||||
cmos_write(RTC_HOURS, 0x02);
|
||||
cmos_write(RTC_MINUTES, 0x04);
|
||||
cmos_write(RTC_SECONDS, 0x58);
|
||||
cmos_write(RTC_REG_A, 0x26);
|
||||
|
||||
g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
|
||||
g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
|
||||
g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x11);
|
||||
|
||||
/* Set a date in 2080 to ensure there is no year-2038 overflow. */
|
||||
cmos_write(RTC_REG_A, 0x76);
|
||||
cmos_write(RTC_YEAR, 0x80);
|
||||
cmos_write(RTC_REG_A, 0x26);
|
||||
|
||||
g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
|
||||
g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
|
||||
g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x80);
|
||||
|
||||
cmos_write(RTC_REG_A, 0x76);
|
||||
cmos_write(RTC_YEAR, 0x11);
|
||||
cmos_write(RTC_REG_A, 0x26);
|
||||
|
||||
g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
|
||||
g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
|
||||
g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
|
||||
g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x11);
|
||||
}
|
||||
|
||||
static void bcd_check_time(void)
|
||||
{
|
||||
/* Set BCD mode */
|
||||
@@ -269,6 +313,7 @@ int main(int argc, char **argv)
|
||||
qtest_add_func("/rtc/bcd/check-time", bcd_check_time);
|
||||
qtest_add_func("/rtc/dec/check-time", dec_check_time);
|
||||
qtest_add_func("/rtc/alarm-time", alarm_time);
|
||||
qtest_add_func("/rtc/set-year", set_year);
|
||||
qtest_add_func("/rtc/fuzz-registers", fuzz_registers);
|
||||
ret = g_test_run();
|
||||
|
||||
|
||||
@@ -372,6 +372,10 @@ VncInfo *qmp_query_vnc(Error **errp)
|
||||
}
|
||||
}
|
||||
|
||||
if (vnc_display->lsock == -1) {
|
||||
return info;
|
||||
}
|
||||
|
||||
if (getsockname(vnc_display->lsock, (struct sockaddr *)&sa,
|
||||
&salen) == -1) {
|
||||
error_set(errp, QERR_UNDEFINED_ERROR);
|
||||
@@ -1802,10 +1806,12 @@ static void set_encodings(VncState *vs, int32_t *encodings, size_t n_encodings)
|
||||
vs->features |= VNC_FEATURE_TIGHT_MASK;
|
||||
vs->vnc_encoding = enc;
|
||||
break;
|
||||
#ifdef CONFIG_VNC_PNG
|
||||
case VNC_ENCODING_TIGHT_PNG:
|
||||
vs->features |= VNC_FEATURE_TIGHT_PNG_MASK;
|
||||
vs->vnc_encoding = enc;
|
||||
break;
|
||||
#endif
|
||||
case VNC_ENCODING_ZLIB:
|
||||
vs->features |= VNC_FEATURE_ZLIB_MASK;
|
||||
vs->vnc_encoding = enc;
|
||||
|
||||
Reference in new issue
Block a user