Integrated USB/TCP stack from T8030

hw/usb/hcd-dwc2.h

@@ -28,8 +28,8 @@
 
 #define DWC2_MMIO_SIZE      0x11000
 
-#define DWC2_NB_CHAN        16      /* Number of host channels */
-#define DWC2_MAX_XFER_SIZE  0x1000  /* Max transfer size expected in HCTSIZ */
+#define DWC2_NB_CHAN        8       /* Number of host channels */
+#define DWC2_MAX_XFER_SIZE  65536   /* Max transfer size expected in HCTSIZ */
 #define DWC2_NB_EP          16      /* Number of device endpoints */
 
 typedef struct DWC2Packet DWC2Packet;
@@ -70,7 +70,6 @@ struct DWC2State {
 
     /*< public >*/
     USBBus bus;
-    /* This device in device mode */
     DWC2DeviceState *device;
     qemu_irq irq;
     MemoryRegion *dma_mr;
@@ -121,13 +120,6 @@ struct DWC2State {
             uint32_t hptxfsiz;      /* 100 */
         };
     };
-    union {
-#define DWC2_DFSZREG_SIZE    0x3c
-        uint32_t dfszreg[DWC2_DFSZREG_SIZE / sizeof(uint32_t)];
-        struct {
-            uint32_t dptxfsiz[DWC2_NB_EP];      /* 104 */
-        };
-    };
 
     union {
 #define DWC2_HREG0_SIZE     0x44
@@ -206,13 +198,13 @@ uint32_t diepreg[DWC2_DIEPREG_SIZE / sizeof(uint32_t)];
 
     /* TODO - implement FIFO registers for slave mode */
 #define DWC2_HFIFO_SIZE     (0x1000 * DWC2_NB_CHAN)
+
     /*
      *  Internal state
      */
     QEMUTimer *eof_timer;
     QEMUTimer *frame_timer;
     QEMUBH *async_bh;
-    QEMUBH *device_async_bh;
     int64_t sof_time;
     int64_t usb_frame_time;
     int64_t usb_bit_time;
@@ -223,10 +215,7 @@ uint32_t diepreg[DWC2_DIEPREG_SIZE / sizeof(uint32_t)];
     bool working;
     USBPort uport;
     DWC2Packet packet[DWC2_NB_CHAN];                   /* one packet per chan */
-    union {
-        uint8_t usb_buf[DWC2_NB_CHAN][DWC2_MAX_XFER_SIZE]; /* one buffer per chan */
-        uint8_t fifos_buf[DWC2_HFIFO_SIZE];
-    };
+    uint8_t usb_buf[DWC2_NB_CHAN][DWC2_MAX_XFER_SIZE]; /* one buffer per chan */
 };
 
 struct DWC2Class {
@@ -243,4 +232,4 @@ OBJECT_DECLARE_TYPE(DWC2DeviceState, USBDeviceClass, DWC2_USB_DEVICE)
 #define TYPE_DWC2_USB   "dwc2-usb"
 OBJECT_DECLARE_TYPE(DWC2State, DWC2Class, DWC2_USB)
 
-#endif
+#endif

hw/usb/hcd-tcp.c

@@ -316,7 +316,6 @@ static void usb_tcp_host_attach(USBPort *uport)
     QIOChannel *ioc = NULL;
     int ret;
     Error *err = NULL;
-    printf("??000\n");
 
     if (uport->index >= G_N_ELEMENTS(s->uports) - 1) {
         error_report("%s: attached to unused port\n", __func__);

include/hw/usb.h

@@ -175,15 +175,6 @@
 
 #define USB_INTERFACE_INVALID         255
 
-/* binary representation */
-struct usb_control_packet {
-    uint8_t  bmRequestType;
-    uint8_t  bRequest;
-    uint16_t wValue;
-    uint16_t wIndex;
-    uint16_t wLength;
-} QEMU_PACKED;
-
 typedef struct USBBusOps USBBusOps;
 typedef struct USBPort USBPort;
 typedef struct USBDevice USBDevice;

include/hw/usb/dwc2-regs.h

@@ -558,11 +558,9 @@
 #define DXEPCTL_TXFNUM_SHIFT            22
 #define DXEPCTL_TXFNUM_LIMIT            0xf
 #define DXEPCTL_TXFNUM(_x)              ((_x) << 22)
-#define DXEPCTL_TXFNUM_GET(_x)          (((_x) >> 22) & 0xf)
 #define DXEPCTL_STALL                   BIT(21)
 #define DXEPCTL_SNP                     BIT(20)
 #define DXEPCTL_EPTYPE_MASK             (0x3 << 18)
-#define DXEPCTL_EPTYPE_SHIFT            (18)
 #define DXEPCTL_EPTYPE_CONTROL          (0x0 << 18)
 #define DXEPCTL_EPTYPE_ISO              (0x1 << 18)
 #define DXEPCTL_EPTYPE_BULK             (0x2 << 18)
@@ -580,7 +578,6 @@
 #define DXEPCTL_MPS_SHIFT               0
 #define DXEPCTL_MPS_LIMIT               0x7ff
 #define DXEPCTL_MPS(_x)                 ((_x) << 0)
-#define DXEPCTL_MPS_GET(_x)             (((_x) >> 0) & 0x7ff)
 
 #define DIEPINT(_a)                     HSOTG_REG(0x908 + ((_a) * 0x20))
 #define DOEPINT(_a)                     HSOTG_REG(0xB08 + ((_a) * 0x20))
@@ -610,26 +607,19 @@
 #define DIEPTSIZ0_PKTCNT_SHIFT          19
 #define DIEPTSIZ0_PKTCNT_LIMIT          0x3
 #define DIEPTSIZ0_PKTCNT(_x)            ((_x) << 19)
-#define DIEPTSIZ0_PKTCNT_GET(_v)        (((_v) >> 19) & 0x3)
 #define DIEPTSIZ0_XFERSIZE_MASK         (0x7f << 0)
 #define DIEPTSIZ0_XFERSIZE_SHIFT        0
 #define DIEPTSIZ0_XFERSIZE_LIMIT        0x7f
 #define DIEPTSIZ0_XFERSIZE(_x)          ((_x) << 0)
-#define DIEPTSIZ0_XFERSIZE_GET(_v)      (((_v) >> 0) & 0x7f)
 
 #define DOEPTSIZ0                       HSOTG_REG(0xB10)
 #define DOEPTSIZ0_SUPCNT_MASK           (0x3 << 29)
 #define DOEPTSIZ0_SUPCNT_SHIFT          29
 #define DOEPTSIZ0_SUPCNT_LIMIT          0x3
 #define DOEPTSIZ0_SUPCNT(_x)            ((_x) << 29)
-#define DOEPTSIZ0_PKTCNT(_x)            (((_x) & 0x1) << 19)
-#define DOEPTSIZ0_PKTCNT_MASK           (0x1 << 19)
-#define DOEPTSIZ0_PKTCNT_SHIFT          19
-#define DOEPTSIZ0_PKTCNT_GET(_v)        (((_v) >> 19) & 0x1)
-#define DOEPTSIZ0_XFERSIZE(_v)          (((_v) & 0x7f) << 0)
+#define DOEPTSIZ0_PKTCNT                BIT(19)
 #define DOEPTSIZ0_XFERSIZE_MASK         (0x7f << 0)
 #define DOEPTSIZ0_XFERSIZE_SHIFT        0
-#define DOEPTSIZ0_XFERSIZE_GET(_v)      (((_v) >> 0) & 0x7f)
 
 #define DIEPTSIZ(_a)                    HSOTG_REG(0x910 + ((_a) * 0x20))
 #define DOEPTSIZ(_a)                    HSOTG_REG(0xB10 + ((_a) * 0x20))
@@ -876,7 +866,6 @@ struct dwc2_dma_desc {
 #define DEV_DMA_BUFF_STS_DMABUSY        1
 #define DEV_DMA_BUFF_STS_DMADONE        2
 #define DEV_DMA_BUFF_STS_HBUSY          3
-#define DEV_DMA_BUFF_STS_GET(_x)        (((_x) >> 30) & 0x3)
 #define DEV_DMA_STS_MASK                (0x3 << 28)
 #define DEV_DMA_STS_SHIFT               28
 #define DEV_DMA_STS_SUCC                0