* 'linux-user-for-upstream' of git://gitorious.org/qemu-maemo/qemu:
linux-user: fix mips and ppc to use UID16
update binfmt conf
linux-user: fix compiler error on nptl
ARM: linux-user: Restore iWMMXT state from ucontext on sigreturn
ARM: linux-user: Expose iWMMXT registers to signal handlers
ARM: linux-user: Restore VFP state from ucontext on sigreturn
ARM: linux-user: Expose VFP registers to signal handlers
ARM: Expose vfp_get_fpscr() and vfp_set_fpscr() to C code
ARM: linux-user: Correct size of padding in target_ucontext_v2
target-sparc: remove unused functions cpu_lock(), cpu_unlock()
ARM: enable XScale/iWMMXT in linux-user mode
linux-user: Translate getsockopt level option
linux-user: remove unnecessary local from __get_user(), __put_user()
linux-user: fix memory leaks with NPTL emulation
linux-user: mmap_reserve() not controlled by RESERVED_VA
[PATCH] target-arm: remove unused functions cpu_lock(), cpu_unlock()
Some SW drivers dont keep track of what they've written and
depend on the HW latching write contents for later
read+modify+write sequences.
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
When hw interrupt pending bits in CP0_Cause are set, the CPU should
see the hw interrupt line as active. The CPU may or may not take the
interrupt based on internal state (global irq mask etc) but the glue
logic shouldn't care.
This fixes MIPS external hw interrupts in combination with -icount.
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
Edgar E. Iglesias