Commit Graph
100 Commits
Author SHA1 Message Date
Peter Crosthwaite 7426aa72c3 nand: Don't inherit from Sysbus
Nand chips are not sysbus devices - they do not have any sense of MMIO,
nor interrupts. Re-parent to TYPE_DEVICE accordingly.

Cc: afaerber@suse.de

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-25 19:15:46 +01:00
Peter Crosthwaite d47a5d9b9d block/nand: Convert Sysbus::init to Device::realize
The prescribed transition from Sysbus::init function to a
Device::realize.

Cc: afaerber@suse.de

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-25 19:15:45 +01:00
Peter Crosthwaite e12078cc62 block/nand: QOM casting sweep
Define and use standard QOM cast macro. Remove usages of DO_UPCAST and
direct -> style casting.

Cc: afaerber@suse.de

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-25 19:06:31 +01:00
Peter Crosthwaite 1984745ea8 block/nand: Formatting sweep
Make this code closer to passing checkpatch. Mostly missing braces, but
a few rogue tabs in there as well.

Cc: qemu-trivial@nongnu.org

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-06-21 22:52:50 +04:00
Peter Crosthwaite 2eb74e1a1e memory: render_memory_region: factor out fr constant setters
These 4 replicated lines set properties of fr that are constant over
the course of the function. Factor out their repeated setting (and also
guards against them being set multiple times in the loop below).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20 16:39:52 +02:00
Peter Crosthwaite 41a6e477fd memory: as_update_topology_pass: Improve comments
These comments were a little difficult to read. First one had
incorrect parenthesis. The part about attributes changing is
really applicable to the region being 'in both' rather than 'in
new'

Second comment has an obscure parenthetic about 'Logging may have
changed'. Made clearer, as this if is supposed to handle the case where
the memory region is unchanged (with the notable exception re logging).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20 16:39:52 +02:00
Peter Crosthwaite 8508e024cb memory: Fix comment typo
s/ajacent/adjacent

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20 16:39:52 +02:00
Peter Crosthwaite afd59989db intc/xilinx_intc: Dont lower IRQ when HIE cleared
This is a little strange. It is lowering the parent IRQ pin on input
when HIE is cleared. There is no such behaviour in the real hardware.

ISR changes based on interrupt pin state are already guarded on HIE
being set. So we can just delete this if in its entirety.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:45:00 +02:00
Peter Crosthwaite fa96d6142f intc/xilinx_intc: Inhibit write to ISR when HIE
When the Hardware Interrupt Enable (HIE) bit is set, software cannot
change ISR. Add write guard accordingly.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:45:00 +02:00
Peter Crosthwaite 45fdd3bf5a intc/xilinx_intc: Handle level interrupt retriggering
Acking a level sensitive interrupt should have no effect if the
interrupt pin is still asserted. The current implementation requires
and edge condition to occur for setting a level sensitive IRQ, which
means an ACK can clear a level sensitive interrupt, until the original
source strobes the interrupt again.

Fix by keeping track of the interrupt pin state and setting ISR based
on this every time update_irq() is called.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:45:00 +02:00
Peter Crosthwaite 6327c221ff intc/xilinx_intc: Don't clear level sens. IRQs without ACK
For level sensitive interrupts, ISR bits are cleared when the input pin
is lowered. This is incorrect. Only software can clear ISR bits (via
IAR or direct write to ISR with !MER(2)).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:44:59 +02:00
Peter Crosthwaite 37a011e9ba microblaze/petalogix_s3adsp1800_mmu: Fix UART IRQ
The UART IRQ is edge sensitive, whereas the machine was registering it
as level sensitive. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:44:59 +02:00
Peter Crosthwaite 96ce654576 configure: dtc: Probe for libfdt_env.h
Currently QEMU provides a local clone of the file libfdt_env.h in
/include. This file is supposed to come with the libfdt package and is
only needed for broken installs of libfdt. Now that we have submodule
dtc, just ignore these broken installs and prompt for the dtc submodule
install instead. QEMU's local libfdt_env.h is removed accordingly.

Manifests as a bug when building QEMU with modern libfdt. The new
version of libfdt does not compile when QEMUs libfdt_env.h takes
precedence over the hosts.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 9b6a3a52e3f46cfbc1ded9ab56385ec045e46705.1369628289.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-14 15:33:12 +01:00
Peter Crosthwaite 52bb7c6a06 audio/intel-hda: QOM casting sweep
Define and use standard QOM cast macro. Remove usages of DO_UPCAST and
direct -> style casting.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 96f00396338321f5a76c9b86c629b69895e4d2d0.1370496582.git.peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-14 08:59:28 -05:00
Peter Crosthwaite 062db74023 audio/intel-hda: Fix Inheritance hierachy
The ich6 and ich9 variants either need to inherit one from the other,
or both from a common base class, otherwise its not possible to create
a QOM cast macro for use by the shared implementation functions.
Went for option B, with a common base class.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 54453b6aa8afa1a76b2ec1932f1d7fd25205d0bc.1370496582.git.peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-14 08:59:28 -05:00
Peter Crosthwaite b5601df762 char/serial: serial_ioport_write: Factor out common code
These three lines are common to both FIFO and regular mode. Just factor
them out to outside the if rather than replicate the same lines inside
both if and else.

Cc: qemu-trivial@nongnu.org

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-06-11 23:45:44 +04:00
Peter Crosthwaite 8e8638fa87 char/serial: Use generic Fifo8
Use the generic Fifo8 helper provided by QEMU, rather than re-implement
privately.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-06-11 23:45:44 +04:00
Peter Crosthwaite 7f4f0a227f char/serial: cosmetic fixes.
Some cosmetic fixes to char/serial fixing some checkpatch errors.

Cc: qemu-trivial@nongnu.org

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-06-11 23:45:44 +04:00
Peter Crosthwaite 5c9f43363a intc/xilinx_intc: Use qemu_set_irq
Use qemu_set_irq rather than if-elsing qemu_irq_(lower|raise). No
functional change, just reduces verbosity.

Cc: qemu-trivial@nongnu.org

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-06-11 23:45:43 +04:00
Peter Crosthwaite 37ab4a5668 sd/sd.c: Fix "inquiry" ACMD41
QEMU models two (of the three) ACMD41 has two modes, "inquiry" and
"first". The selection logic for which of the two is incorrect - it
compares != 0 for the entire argument value rather than only bits 23:0
as per the spec. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 3ef0a7fd1b2f3ebb23b4fdeabcc14caf3fad6d71.1369622254.git.peter.crosthwaite@xilinx.com
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:45 +01:00
Peter Crosthwaite 1d32c26f28 sd/sdhci:ADMA: fix interrupt
The end of transfer check was occurring and potentially returning before
the interrupt flag was checked. This means the interrupt will be missed
if it occurs on the last packet. Fix by checking for the interrupt
before checking for the end of transfer.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 9969ec154777957ec738fc4e539d68e7494d0081.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:45 +01:00
Peter Crosthwaite 677ff2ae66 sd/sdhci.c: Fix bdata_read DPRINT message
This message was printing out the data in decimal only, which is not
very friendly to the debugging developer. Add hex variant in
parenthesis to make it consistent with other similar messages in this
module.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: d624179649137832eaa8caa263ef9589b4395d5e.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:45 +01:00
Peter Crosthwaite dcdb4cd850 sd/sdhci: Fix Buffer Write Ready interrupt
This interrupt is not risen after the last block is written to sd. It
is mutually exclusive with the end of transfer conditions. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 7ca9fd3e03ce1bec94aff08f607c15a0ec3d3371.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:44 +01:00
Peter Crosthwaite 656f416c65 sd/sdhci.c: Only reset data_count on new commands
The data_count variable was being reset on every transfer, including
DMA transfer resumptions. This is incorrect, it should only be set
on a new command.

Manifests as a bug when using ADMA and there is a timer delay between
ADMA frames where the fifo is left in a non empty state.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 15a98609cc32315211b0963091a8efd67522e160.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:44 +01:00
Peter Crosthwaite b0b7ae6259 xilinx_spips: lqspi: Fix byte/misaligned access
The LQSPI bus attachment supports byte/halfword and misaligned
accesses. Fixed. Refactored the LQSPI cache to be byte-wise
instead of word wise accordingly.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 5ec47b13563ad2d22105a1f26186d7756718394b.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:44 +01:00
Peter Crosthwaite a66418f6f1 xilinx_spips: lqspi: Push more data to tx-fifo
Do 16 words per fifo flush. Increases performance and decreases
debug verbosity. This data depth has no real hardware analogue,
so just go with something that has reasonable performance.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 5621ee4621941d3639b5cacfdec26bd3148f31d5.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:44 +01:00
Peter Crosthwaite 4a5b6fa8d9 xilinx_spips: Multiple debug verbosity levels
The debug printfs on every SPI operation is extremely verbose. Add
a second level of debug for this.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: f63478b8e5b29cc011cdc10e29f8537bb2fc2b5e.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:43 +01:00
Peter Crosthwaite c37fc509d2 xilinx_spips: Debug msgs for Snoop state
This is worth keeping track of when debugging the device model.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: d3b44ecf23d671798b062eee5dc362c716ea54cd.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:43 +01:00
Peter Crosthwaite 9151da25a7 xilinx_spips: Fix striping behaviour
The QSPI controller was using byte-wide stripes when striping across
the two flashes in dual parallel mode. The real hardware however uses
individual bit striping. QEMU misbehaves in the (corner) case where
data is written/read in dual-parallel mode and read/written back in
single mode.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 718a61df1bf746ec06f6da44d12f8317af7b08ce.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:43 +01:00
Peter Crosthwaite 2133a5f6b8 xilinx_spips: Fix CTRL register RW bits
The CTRL register was RAZ/WI on some of the RW bits. Even though the
function behind these bits is invalid in QEMU, they should still be
guest accessible. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: b7aaad93163ce4af0c428635804ac7b77a567b25.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:43 +01:00
Peter Crosthwaite 15408b428f xilinx_spips: lqspi: Dont touch config register
The LQSPI mode is supposed to work via the automatic CS mode feature
rather than manipulate CS lines itself. Now that auto CS is implemented
remove LQSPIs CS mode override logic. There is still a need to
manipulate the U_PAGE bit in LQSPI config register to implement
dual-stack mode however.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 000c8dd54df09523f17052638100722ef0f5a3af.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:43 +01:00
Peter Crosthwaite c4f08ffe13 xilinx_spips: Implement automatic CS
Implement the automatic CS control feature. If the MANUAL_CS bit is
cleared then the chip select stay de-asserted as long as the tx FIFO
is empty.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 1d67383adc42761af715a93f161344b9284dfc9a.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:42 +01:00
Peter Crosthwaite e100f3be0c xilinx_spips: Add automatic start support
SPI has a mode where it automatically starts based on tx fifo
occupancy. Implemented.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: f4e9accb5de87b526fff6ed937f63278db76533b.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:42 +01:00
Peter Crosthwaite b5cd9143e7 xilinx_spips: Trash LQ page cache on mode change
Invalidate the LQSPI cached page when transitioning into LQSPI mode.
Otherwise there is a possibility that the controller will return stale
data to the guest when transitioning back to LQ_MODE after a page
program.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 677490a6ee1953fe5d366e599d665de645ac84db.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:42 +01:00
Peter Crosthwaite 10e60b35d0 xilinx_spips: Fix QSPI FIFO size
QSPI has a bigger FIFO than the regular SPI controller. Differentiate
between the two with correct FIFO sizes for each.

This is the first piece of class data for SPIPS, so this patch sees
the creation of the XilinxSPIPSClass definition and assoicated QOM
constructs.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: acee25dd5e203215cbc15ca5d3cb5d5b2efebe7b.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:42 +01:00
Peter Crosthwaite abef5fa643 xilinx_spips: Add verbose LQSPI debug output
You really need this is you want to track a guest banging on LQSPI.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 26e508da4af11058d37daa777064c9e5c2a69abb.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:41 +01:00
Peter Crosthwaite 3ea728d0c8 xilinx_spips: Inhibit interrupts in LQSPI mode
The real hardware does not produce interrupts in LQSPI mode. Inhibit
generation of interrupts when the LQ_MODE bit is set.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: dff794a06872009ea7e5733ce6adcff94d18bbd0.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:41 +01:00
Peter Crosthwaite 87920b44a1 xilinx_spips: Make interrupts clear on read
By default these interrupts are clear on read.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 999ff0091ed3cc3969a431bf55c00ef934cecc8e.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:41 +01:00
Peter Crosthwaite 6b91f0155b xilinx_spips: seperate SPI and QSPI as two classes
Make SPI and QSPI different classes. QSPIPS is setup as a child of SPIPS.
Only QSPI has the LQSPI functionality, so move all that to the child class.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 2cdd0cadb5ba77ca02fde5cae627852dc9a64c71.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03 17:17:41 +01:00
Peter Crosthwaite 95916abcf4 qom/object: Don't poll cast cache for NULL objects
object_dynamic_cast_assert used to be tolerant of NULL objects and not
assert. It's clear from the implementation that this is the expected
behavior.

The preceding check of the cast cache dereferences obj however causing
a segfault. Fix by conditionalizing the cast cache logic on obj being
non-null.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 8e2bef6a55753869c50bfa32226f7fcf0439ca62.1369183592.git.peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-05-22 07:40:09 -05:00
Peter Crosthwaite 3d1bba2091 glib: Fix some misuses of gsize/size_t types
This unbreaks cross compile builds:

configure --target-list="i386-softmmu" --cpu=i386

When building on a 64bit machine.

Reported-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 926326e96fd8685d74e9d5bf430fe4ad97a55289.1369191585.git.peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-05-22 07:40:09 -05:00
Peter Crosthwaite e3351000cd Makefile: Use QEMU_FLAGS for DTC compilation
Build DTC as QEMU is built. Fixes the issue with mingw build which can't
handles DTC's default CFLAGS.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-26 02:48:10 +02:00
Peter Crosthwaite 9005a51b09 Makefile: Don't build shared libfdt
The submodule DTC should just build and use DTC as static (the whole
motivation for using submod is lack of widespread distro support).

The .so causes build failures on some platforms, so adjust the make
target to just build the static lib.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-26 02:48:10 +02:00
Peter Crosthwaite ad6b40f471 m25p80: Remove bogus include of devices.h
I think in the early revisions of this we had an instantiation helper
for the device in devices.h. This was later removed and this header was
left over. Removed

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-04-19 11:45:58 +02:00
Peter Crosthwaite a540f158db configure/Make: Build libfdt from submodule DTC
Configure to use the DTC submodule to build libfdt when no system libfdt
is found. Prompt to install the DTC submodule if --enable-fdt is set but
no DTC can be found.

DTC has no out-of-tree build capability, so the configure will symlink
the Makefile and scripts directory in the out of tree build directory
and pass in all the needed DTC arguments to make out of tree build happen.
Ideally we fix the DTC make to support out of tree, but did it this way to
avoid commits to DTC.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-18 13:50:53 +02:00
Peter Crosthwaite 98f6360569 dtc: add submodule
Add dtc submodule as a fallback for old distros.
Picking version 1.3.0. as this is the most recently tagged stable version.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-18 13:50:53 +02:00
Peter Crosthwaite 79f3b12f70 configure: Put cross compile flags in EXTRA_CFLAGS
The cross compile CFLAGS are needed to properly build pixman (and any other
submodules). Only the EXTRA_CFLAGS set is passed to submodules not QEMU_CFLAGS,
so put the cross compile flags in EXTRA_CFLAGS instead.

Signed-off-by: Peter Crosthwaite peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-18 13:50:53 +02:00
Peter Crosthwaite 095b9c4860 m25p80: Add debug message for no bdrv
If there is no backing bdrv, let the debugging developer know about it.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:25:34 +02:00
Peter Crosthwaite 28097d0207 m25p80.c: Multiple debug verbosity levels
The debug printfs on every page program/read is extremely verbose. Add
a second level of debug for this.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:25:34 +02:00
Peter Crosthwaite e9711b4d52 m25p80: Convert guest errors to LOG_GUEST_ERROR
Some of the debug printfs in m25p80 are really guest errors.
Changed over to qemu_log_mask(LOG_GUEST_ERROR accordingly.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:25:34 +02:00
Peter Crosthwaite 3bec0c7d46 m25p80: Fix debug messages.
Some dodgy casts were making a mess of these msgs.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:25:34 +02:00
Peter Crosthwaite 42bb9c9178 stream: Remove app argument hack
The uint32_t *app argument doesn't exist in real hardware. It was a hack in
xilinx_axidma/enet to fake the (secondary) control stream connection. Removed
the argument and added the second stream to axienet/dma.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:23 +02:00
Peter Crosthwaite 3630ae952a xilinx_axienet/dma: Implement rx path flow control
Implement flow control for the RX data path from xilinx_axienet->xilinx_axidma.
On short return from axidma, then ethernet sets up the notify callback to resume
transfer from where it left off.

This also allows the ethernet to track whether there is an in progress transaction
and return false from ethernet can_receive() as appropriate.

If the DMA backs up or is disabled it waits for enablement. When the rx stream IO
region is touched, the can_push() notify function is called if set.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:23 +02:00
Peter Crosthwaite 35e60bfdbc stream: Add flow control API
Add basic flow control to stream. A stream slave may return short, indicating
that it is not capable of accepting any more data at the present time. Polling
or a callback can be used via the can_push() function to determine when the
slave can receive again.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:23 +02:00
Peter Crosthwaite 210914e299 xilinx_axidma: Fix rx/tx halted bit.
If there is no DMA buffer descriptor, the DMA halts, not idles.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:23 +02:00
Peter Crosthwaite e1500e35c2 xilinx_axidma: Create Proxy object for stream
Create a separate child object to proxy the stream slave connection. This is
setup for future work where a second stream slave connection is needed. The
new child object is created at qdev init time and is linked back to the parent
(the ethernet device itself) automatically.

Stream slave masters differentiate which slave connection they are connected to
by linking to the proxy object rather than the parent.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite 55b3e0c2f8 xilinx_axienet: Create Proxy object for stream
Create a separate child object to proxy the stream slave connection. This is
setup for future work where a second stream slave connection is needed. The
new child object is created at qdev init time and is linked back to the parent
(the ethernet device itself) automatically.

Stream slave masters differentiate which slave connection they are connected to
by linking to the proxy object rather than the parent.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite b19ceaad0d petalogix_ml605_mmu: Attach ethernet to machine
Explicitly make the ethernet a child of the machine. This is needed to set
and use links pre-realize. Also makes the ethernet initialization consistent
with its peer DMA.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite 54ff2a399f petalogix_ml605_mmu: Fix machine node attachment
Just attach devices straight to the root machine node, rather than the
"unattached node"

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite e65436634d xilinx_axidma: converted init->realize
The prescribed transition from SysBusDevice::init to Device::realize. I'm going
with Andreas suggestion to move the sysbus foo to Object::init for early IRQ
visibility.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite 897374db7d xilinx_axidma: Register reset properly
Register the reset function as the Device::reset function rather than
explicitly call it from the sysbus::init.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite cbde584f58 xilinx_axidma: Defined and use type cast macro
Standard QOM cast macro. Replaces usages of FROM_SYSBUS

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite 42e8a283f5 xilinx_axidma: typedef XilinxAXIDMA struct
Typedef xilinx_axidma's object state struct to shorten the repeated usages of
struct XilinxAXIDMA.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite b2d9dfe94c xilinx_axienet: converted init->realize
The prescribed transition from SysBusDevice::init to Device::realize. Im going
with Andreas suggestion to move the sysbus foo to Object::init for early IRQ
visibility.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite 9ee0ceb7a8 xilinx_axienet: Register reset properly
Register the reset function and the Device::reset function rather than
explicitly call it from the sysbus::init.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite f0e7a81c0c xilinx_axienet: Defined and use type cast macro
Standard QOM cast macro. Replaces usages of FROM_SYSBUS

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite 545129e589 xilinx_axienet: typedef XilinxAXIEnet struct
Typedef xilinx_axienets object state struct to shorten the repeated usages of
struct XilinxAXIEnet.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-16 10:04:22 +02:00
Peter Crosthwaite 1db8b5efe0 cadence_uart: Flush queued characters on reset
Reset can be used to empty the rx-fifo. As the fifo full condition is
used to return false from can_receive, queued rx data should be flushed
on reset accordingly.

Cc: Wendy Liang <jliang@xilinx.com>
Cc: Jason Wu <huanyu@xilinx.com>

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reported-by: Jason Wu <huanyu@xilinx.com>
Message-id: 494c1e005e225c915d295ddfd75d992ad2dabc3c.1364964526.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-04-05 17:03:01 +01:00
Peter Crosthwaite fd7f8a99f3 pl330: Don't inhibit ES bits on INTEN
This if-else logic inhibits setting of the event status (ES) bits
when interrupts are enabled. This is incorrect. ES should be set
regardless on INTEN state. INTEN only inhibits the signalling of
events to PL330 threads, not setting of the ES register.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-04-05 16:59:09 +01:00
Peter Crosthwaite f1922e36e2 xilinx_zynq: Cleanup ssi_create_slave
With the recent m25p80 cleanup there is no need to use
ssi_create_slave_no_init() anymore. Just use ssi_create_slave().

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-04-05 15:04:10 +02:00
Peter Crosthwaite e641080fdc petalogix_ml605_mmu: Cleanup ssi_create_slave()
With the recent m25p80 cleanup there is no need to use
ssi_create_slave_no_init() anymore. Just use ssi_create_slave().

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-04-05 15:04:10 +02:00
Peter Crosthwaite 4dbb9ed326 xilinx_axienet: pump events as appropriate
When the conditions blocking receiving are cleared, check for buffered rx
packets.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-04-04 00:55:03 +02:00
Peter Crosthwaite f8b9fe249a xilinx_spips: QOM styling fixes
Few fixes for the latest QOM styling guides.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: de9daeee6c142e8b57ad042fd680cedcdc94d2fc.1362373359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-03-15 16:41:59 +00:00
Peter Crosthwaite 2790cd911e xilinx_spips: Set unused IRQs to NULL
Unused CS lines should init to 0 to avoid segfaulting when accessing an
unattached QSPI controller.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: c1e45198032106e69e8fe9339fc2e6348d524fcd.1362373359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-03-15 16:41:58 +00:00
Peter Crosthwaite 7451afb671 xilinx_zynq: added pl330 to machine model
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 5bc295bd2aa50dfe573f428574dbd7d8add7b3f8.1361853677.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-03-15 16:41:58 +00:00
Peter Crosthwaite 06a1cea5f6 pl330: Initial version
Device model for Primecell PL330 DMA controller.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru>
Tested-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 098aac26233d7334bed2bca4f06f539638ca6d24.1361853677.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-03-15 16:41:58 +00:00
Peter Crosthwaite 6ff66f50f0 iov: Factor out hexdumper
Factor out the hexdumper functionality from iov for all to use. Useful for
creating verbose debug printfery that dumps packet data.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: faaac219c55ea586d3f748befaf5a2788fd271b8.1361853677.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-03-15 16:41:58 +00:00
Peter Crosthwaite 4f30649618 qga/main.c: Don't use g_key_file_get/set_int64
These functions don't exist until glib version 2.26. QEMU is currently only
mandating glib 2.12.

This patch replaces the functions with g_key_file_get/set_integer.

Unbreaks the build on Ubuntu 10.04 and RHEL 5.6.

Regression was introduced by 39097daf15

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1363323879-682-1-git-send-email-peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-03-15 08:23:54 -05:00
Peter Crosthwaite 288f1e3f87 cadence_gem: Add debug msgs for rx desc movement
Add some helpful messages that show the rx descriptor pointer moving as packets
are rxed.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1ef2eb34dade64d589a69a2bcfd5aaddb7d50164.1360901435.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:24 +00:00
Peter Crosthwaite 5025388b50 cadence_gem: Don't reset rx desc pointer on rx_en
This doesn't happen in the real hardware. The Zynq TRM explicitly states that
this bit has no effect on the rx descriptor pointer ("The receive queue
pointer register is unaffected").

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 06fdf92b78ee62d8965779bafd29c8df1a5d2718.1360901435.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:24 +00:00
Peter Crosthwaite ae80a3546f cadence_gem: fix interrupt events
Bits in the ISR were continually mirroring their corresponding TX/RX SR bits.
This is incorrect. The ISR bits are only ever set at the time their
corresponding event occurs.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: cedfb6d108318846480b416a6041023ea5a353d6.1360901435.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:24 +00:00
Peter Crosthwaite 1c5d07909a cadence_gem: factor out can_rx() logic replication
The gem_receive() function replicates the logic for whether or not the device
can rx. Just call the actual gem_can_receive() function in place.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: bf7f93969f3e01fbc76d68d2955307fdbad11bb1.1360901435.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:24 +00:00
Peter Crosthwaite e3f9d31c98 cadence_gem: Flush queued packets
The device needs to check for queued RX packets when the RX path is re-enabled.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1fa8c88a3b7c654886d0a7484c2463cd4c2a2781.1360901435.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:24 +00:00
Peter Crosthwaite a7fd6915d8 m25p80.c: Use QOM classes for part differentiation
Currently, M25P80 uses an object property to differentiate between flash parts.
Changed this over to use QOM sub-classes - the actual names of the different parts
are used to create a set of dynamic classes which passes the part info as class
data. The object no longer needs to search the known_devices table for itself,
instead it just gets its info from its own class.

Kept the intermediate class definition private to m25p80.c for the moment, as
the expectation is parts will only be added as new entries in the table. We can
factor out the TYPE_M25P80 abstraction into a header on a demand basis.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: e24e156d-ff96-4901-997a-e31178b08bee@VA3EHSMHS021.ehs.local
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:24 +00:00
Peter Crosthwaite b972b4e253 xilinx_zynq: Added SD controllers
The Xilinx Zynq device has two SDHCI controllers. Added to the machine model.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:19 +00:00
Peter Crosthwaite 80f4d9fcea vl.c: allow for repeated -sd arguments
Allows for repeating of -sd arguments in the same way as -pflash and -mtdblock.

Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:49:19 +00:00
Peter Crosthwaite 353575f095 arm: a9mpcore: Coreify the SCU
Split the SCU in a9mpcore out into its own object definition. mpcore is now
just a container for the mpcore components.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:23:14 +00:00
Peter Crosthwaite 9595978292 arm: a9mpcore: remove old_timer_status field
This field was write only and thus unused. Removed.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:23:13 +00:00
Peter Crosthwaite cde4577f11 arm: mptimer: Remove WDT distinction
In QEMU emulation, there is no functional difference between the ARM mpcore
private timers and watchdogs. Removed all the distinction between the two from
arm_mptimer.c and converted it to be just the mptimer. a9mpcore and arm11mpcore
just instantiate the same mptimer object twice to get both timer and WDT.

If in the future we want to make the WDT functionally different then we can use
either QOM hierarchy to derive WDT from from mptimer, or we can add a property
"is-wdt" or some such.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:23:13 +00:00
Peter Crosthwaite 845769fc63 arm: arm11mpcore, a9mpcore: CamelCased type names
To conform with QEMU coding style.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:23:13 +00:00
Peter Crosthwaite c6205ddf6c arm: mptimer: CamelCased type names
Trivial find replace on type names "timerblock" and "arm_mptimer_state" to
conform with QEMU coding style.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:23:13 +00:00
Peter Crosthwaite 8c3ac601bd arm/translate.c: Fix adc_CC/sbc_CC implementation
commits 49b4c31efc and
2de68a4900 reworked the implementation of adc_CC
and sub_CC. The new implementations (on the TCG_TARGET_HAS_add2_i32 code path)
are incorrect. The new logic is:

CF:NF = 0:A +/- 0:CF
CF:NF = CF:A +/- 0:B

The lower 32 bits of the intermediate result stored in NF needs to be passes
into the second addition in place of A (s/CF:A/CF:NF):

CF:NF = 0:A +/- 0:CF
CF:NF = CF:NF +/- 0:B

This patch fixes the issue.

Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-25 14:32:36 -06:00
Peter Crosthwaite 00e2ceae6c qom/object.c: Allow itf cast with num_itfs = 0
num_interfaces only tells you how many interfaces the concrete child class has
(as defined in the TypeInfo). This means if you have a child class which defines
no interfaces of its own, but its parent has interfaces you cannot cast to those
parent interfaces.

Fixed changing the guard to check the class->interfaces list instead (which is
a complete flattened list of implemented interfaces).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: a8c2db3b9b1f3c4bb81aca352b69e33260f36545.1361246206.git.peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-21 16:34:10 -06:00
Peter Crosthwaite 3e407de477 qom/object.c: Reset interface list on inheritance
The QOM framework will attempt the recreate a classes interface list from
scratch for each class. This means that a child class should zero out the
list of interfaces when cloned from the parent class.

Currently the list is memcpy()d from the parent to the child. As the interface
list is just a pointer to a list, this means the parent and child will share
the same list of interfaces. When the child inits, it will append its own
interfaces to the parents list. This is incorrect as the parent should not pick
up its childs interfaces.

This actually causes an infinite loop at class init time, as the child will
iterate through the parent interface list adding each itf to its own list(in
type_initialize()). As the list is (erroneously) shared, the new interface
instances for the child are appended to the parent, and the iterator never hits
the tail and loops forever.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1f58d2b629d82865dbb2fd5ba8445854049c4382.1361246206.git.peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-21 16:34:10 -06:00
Peter Crosthwaite b15aaca430 xilinx_axienet.c: Assert no error when making link
This gives an awful silent failure when it doesn't work. Assert against link
creation failure.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-02-21 10:33:39 +01:00
Peter Crosthwaite 9893c80d81 cadance_uart: Accept input after rx FIFO pop
The device returns false from the can receive function when the FIFO is
full. This means the device should check for buffered input whenever a byte is
popped from the FIFO.

Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1360632571-25638-1-git-send-email-peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-13 11:57:58 -06:00
Peter Crosthwaite 7ce4106c21 xilinx.h: s/xilinx_axiethernetdma()/xilinx_axidma()
This function has nothing to do with ethernet. Its reusable for all DMA clients.
Dropped the "ethernet" in the name accordingly.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-02-13 13:01:24 +01:00
Peter Crosthwaite dada5c7e92 xilinx.h: Dont qdev_create from ethernet_create()
Pulled the qdev_create functionality out of xilinx_axiethernet_create() and
pushed it up to the petalogix_ml605_mmu machine model. This makes the ethernet
create+init process consistent with the AXI DMA. Renamed function to
xilinx_axiethernet_init accordingly.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-02-13 13:01:24 +01:00
Peter Crosthwaite 74cef80c47 xilinx_axidma: Fix debug mode compile messages
Missing cast one one of the conditionally compiled printfs.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-01-30 10:31:27 +01:00
Peter Crosthwaite 080251a464 cadence_gem: Debug mode compile fixes
Some printfs are throwing warnings when debug mode is enabled. Fixed.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-01-30 10:31:27 +01:00