ipod_touch_2g
79
Commits
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de35244e99 |
tests/acpi/bios-tables-test: do not write new blobs unless there are changes
When dumping table blobs using rebuild-expected-aml.sh, table blobs from all test variants are dumped regardless of whether there are any actual changes to the tables or not. This creates lot of new files for various test variants that are not part of the git repository. This is because we do not check in all table blobs for all test variants into the repository. Only those blobs for those variants that are different from the generic test-variant agnostic blob are checked in. This change makes the test smarter by checking if at all there are any changes in the tables from the checked-in gold master blobs and take actions accordingly. When there are no changes: - No new table blobs would be written. - Existing table blobs will be refreshed (git diff will show no changes). When there are changes: - New table blob files will be dumped. - Existing table blobs will be refreshed (git diff will show that the files changed, asl diff will show the actual changes). When new tables are introduced: - Zero byte empty file blobs for new tables as instructed in the header of bios-tables-test.c will be regenerated to actual table blobs. This would make analyzing changes to tables less confusing and there would be no need to clean useless untracked files when there are no table changes. CC: peter.maydell@linaro.org Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20231107044952.5461-1-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> |
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0034d0395e |
tests/avocado: add test to exercise processor address space memory bound checks
QEMU has validations to make sure that a VM is not started with more memory (static and hotpluggable memory) than what the guest processor can address directly with its addressing bits. This change adds a test to make sure QEMU fails to start with a specific error message when an attempt is made to start a VM with more memory than what the processor can directly address. The test also checks for passing cases when the address space of the processor is capable of addressing all memory. Boundary cases are tested. CC: imammedo@redhat.com CC: David Hildenbrand <david@redhat.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-ID: <20231109045601.33349-1-anisinha@redhat.com> Message-ID: <D5D8D419-76BA-4FB0-9BAC-4F7470A052FC@redhat.com> [PMD: Use SPDX tag] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
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94cd94f1c0 |
acpi/tests/avocado/bits: enable console logging from bits VM
Console logs from the VM can be useful for debugging when things go wrong. Other avocado tests enables them. This change enables console logging with the following changes: - point to the newer bios bits image that actually enabled VM console. - change the bits test to drain the console logs from the VM and write the logs. - wait for SHUTDOWN event from QEMU so that console logs can be drained out of the socket before it is closed as a part of vm.wait(). Additionally, following two cosmetic changes have been made: - Removed VM QEMU command line logging as avocado framework already logs it. This is a minor cleanup along the way. - Update my email to my work email in the avocado acpi bios bits test. CC: jsnow@redhat.com Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20231027032120.6012-3-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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a874ddc95a |
acpi/tests/avocado/bits: enforce 32-bit SMBIOS entry point
QEMU defaults to 64-bit entry point since the following commit
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d830054247 |
target/i386: check CPUID_PAE to determine 36 bit processor address space
PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the guest processor and set phys_bits to 36 if PAE feature is set. This is in addition to checking the presence of PSE36 CPUID feature for setting 36 bit phys_bits. Signed-off-by: Ani Sinha <anisinha@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-ID: <20230912120650.371781-1-anisinha@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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4076bc86a3 |
hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range
pc_get_device_memory_range() finds the device memory size by calculating the difference between maxram and ram sizes. This calculation makes sense only when maxram is greater than the ram size. Make sure we check for that before calling pc_get_device_memory_range(). Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20231011105335.42296-1-anisinha@redhat.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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363636787d |
hw/i386: changes towards enabling -Wshadow=local for x86 machines
Code changes that addresses all compiler complaints coming from enabling -Wshadow flags. Enabling -Wshadow catches cases of local variables shadowing other local variables or parameters. These makes the code confusing and/or adds bugs that are difficult to catch. See also Subject: Help wanted for enabling -Wshadow=local Message-Id: <87r0mqlf9x.fsf@pond.sub.org> https://lore.kernel.org/qemu-devel/87r0mqlf9x.fsf@pond.sub.org CC: Markus Armbruster <armbru@redhat.com> CC: Philippe Mathieu-Daude <philmd@linaro.org> CC: mst@redhat.com Signed-off-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20231003102803.6163-1-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> |
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cf0386509e |
hw/i386/pc: improve physical address space bound check for 32-bit x86 systems
32-bit x86 systems do not have a reserved memory for hole64. On those 32-bit
systems without PSE36 or PAE CPU features, hotplugging memory devices are not
supported by QEMU as QEMU always places hotplugged memory above 4 GiB boundary
which is beyond the physical address space of the processor. Linux guests also
does not support memory hotplug on those systems. Please see Linux
kernel commit b59d02ed08690 ("mm/memory_hotplug: disable the functionality
for 32b") for more details.
Therefore, the maximum limit of the guest physical address in the absence of
additional memory devices effectively coincides with the end of
"above 4G memory space" region for 32-bit x86 without PAE/PSE36. When users
configure additional memory devices, after properly accounting for the
additional device memory region to find the maximum value of the guest
physical address, the address will be outside the range of the processor's
physical address space.
This change adds improvements to take above into consideration.
For example, previously this was allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
With this change now it is no longer allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
qemu-system-x86_64: Address space limit 0xffffffff < 0x2bfffffff phys-bits too low (32)
However, the following are allowed since on both cases physical address
space of the processor is 36 bits:
$ ./qemu-system-x86_64 -cpu pentium2 -m size=10G
$ ./qemu-system-x86_64 -cpu pentium,pse36=on -m size=10G
For 32-bit, without PAE/PSE36, hotplugging additional memory is no longer allowed.
$ ./qemu-system-i386 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too low (32)
$ ./qemu-system-i386 -machine q35 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too low (32)
A new compatibility flag is introduced to make sure pc_max_used_gpa() keeps
returning the old value for machines 8.1 and older.
Therefore, the above is still allowed for older machine types in order to support
compatibility. Hence, the following still works:
$ ./qemu-system-i386 -machine pc-i440fx-8.1 -m size=1G,maxmem=3G,slots=2
$ ./qemu-system-i386 -machine pc-q35-8.1 -m size=1G,maxmem=3G,slots=2
Further, following is also allowed as with PSE36, the processor has 36-bit
address space:
$ ./qemu-system-i386 -cpu 486,pse36=on -m size=1G,maxmem=3G,slots=2
After calling CPUID with EAX=0x80000001, all AMD64 compliant processors
have the longmode-capable-bit turned on in the extended feature flags (bit 29)
in EDX. The absence of CPUID longmode can be used to differentiate between
32-bit and 64-bit processors and is the recommended approach. QEMU takes this
approach elsewhere (for example, please see x86_cpu_realizefn()), With
this change, pc_max_used_gpa() also uses the same method to detect 32-bit
processors.
Unit tests are modified to not run 32-bit x86 tests that use memory hotplug.
Suggested-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230922160413.165702-1-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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7b393b7142 |
hw/acpi: changes towards enabling -Wshadow=local
Code changes in acpi that addresses all compiler complaints coming from enabling
-Wshadow flags. Enabling -Wshadow catches cases of local variables shadowing
other local variables or parameters. These makes the code confusing and/or adds
bugs that are difficult to catch. See also
Subject: Help wanted for enabling -Wshadow=local
Message-Id: <87r0mqlf9x.fsf@pond.sub.org>
https://lore.kernel.org/qemu-devel/87r0mqlf9x.fsf@pond.sub.org
The code is tested to build with and without the flag turned on.
CC: Markus Armbruster <armbru@redhat.com>
CC: Philippe Mathieu-Daude <philmd@linaro.org>
CC: mst@redhat.com
CC: imammedo@redhat.com
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Message-ID: <20230922124203.127110-1-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
[Commit message tweaked]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
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67d045a0ef |
hw/pci: add comment to explain checking for available function 0 in pci hotplug
This change is cosmetic. A comment is added explaining why we need to check for the availability of function 0 when we hotplug a device. CC: mst@redhat.com CC: mjt@tls.msk.ru Signed-off-by: Ani Sinha <anisinha@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> |
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ca92eb5def |
hw/pci: warn when PCIe device is plugged into non-zero slot of downstream port
PCIe downstream ports only have a single device 0, so PCI Express devices can only be plugged into slot 0 on a PCIe port. Add a warning to let users know when the invalid configuration is used. We may enforce this more strongly later once we get more clarity on whether we are introducing a bad regression for users currently using the wrong configuration. The change has been tested to not break or alter behaviors of ARI capable devices by instantiating seven vfs on an emulated igb device (the maximum number of vfs the igb device supports). The vfs are instantiated correctly and are seen to have non-zero device/slot numbers in the conventional PCI BDF representation. CC: jusual@redhat.com CC: imammedo@redhat.com CC: mst@redhat.com CC: akihiko.odaki@daynix.com Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2128929 Signed-off-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Julia Suvorova <jusual@redhat.com> Message-Id: <20230705115925.5339-6-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> |
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579edbd459 |
tests/qtest/hd-geo-test: fix incorrect pcie-root-port usage and simplify test
The test attaches a SCSI controller to a non-zero slot and a pcie-to-pci bridge on slot 0 on the same pcie-root-port. Since a downstream device can be attached to a pcie-root-port only on slot 0, the above test configuration is not allowed. Additionally using pcie.0 as id for pcie-to-pci bridge is incorrect as that id is reserved only for the root bus. In the test scenario, there is no need to attach a pcie-root-port to the root complex. A SCSI controller can be attached to a pcie-to-pci bridge which can then be directly attached to the root bus (pcie.0). Fix the test and simplify it. CC: mst@redhat.com CC: imammedo@redhat.com CC: Michael Labiuk <michael.labiuk@virtuozzo.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20230705115925.5339-5-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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bac4711b07 |
tests/acpi/bios-tables-test: update acpi blob q35/DSDT.noacpihp
Some fixes were committed in bios-tables-test in the previous commit. Update
the acpi blob and clear bios-tables-test-allowed-diff.h so that the test
continues to pass with the changes in the bios-tables-test.
Following is the asl diff between the old and the newly updated blob:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20210604 (64-bit version)
* Copyright (c) 2000 - 2021 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.noacpihp, Wed Jun 21 18:26:52 2023
+ * Disassembly of /tmp/aml-O8SU61, Wed Jun 21 18:26:52 2023
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00002038 (8248)
+ * Length 0x00002031 (8241)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x4A
+ * Checksum 0x89
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3148,48 +3148,48 @@
{
Name (_ADR, Zero) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
{
0x01F5
}
Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
}
Device (S40)
{
Name (_ADR, 0x00080000) // _ADR: Address
- Device (S41)
+ Device (S01)
{
- Name (_ADR, 0x00080001) // _ADR: Address
+ Name (_ADR, One) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
{
0x0259
}
Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
- Device (S48)
+ Device (S02)
{
- Name (_ADR, 0x00090000) // _ADR: Address
+ Name (_ADR, 0x02) // _ADR: Address
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
}
}
Device (SF8)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
Scope (\_SB)
{
Field (PCI0.SF8.PIRQ, ByteAcc, NoLock, Preserve)
{
PRQA, 8,
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230705115925.5339-4-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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7b0ba7b1c8 |
tests/acpi/bios-tables-test: use the correct slot on the pcie-root-port
PCIE ports only have one slot, slot 0. Hence, non-zero slots are not available for PCIE devices on PCIE root ports. Fix test_acpi_q35_tcg_no_acpi_hotplug() so that the test does not use them. Signed-off-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230705115925.5339-3-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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8d60105a59 |
tests/acpi: allow changes in DSDT.noacpihp table blob
We are going to fix bio-tables-test in the next patch and hence need to make sure the acpi tests continue to pass. Signed-off-by: Ani Sinha <anisinha@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230705115925.5339-2-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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d2ab529ec5 |
docs/devel: remind developers to run CI container pipeline when updating images
When new dependencies and packages are added to containers, its important to run CI container generation pipelines on gitlab to make sure that there are no obvious conflicts between packages that are being added and those that are already present. Running CI container pipelines will make sure that there are no such breakages before we commit the change updating the containers. Add a line in the documentation reminding developers to run the pipeline before submitting the change. It will also ease the life of the maintainers. Signed-off-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20230506072012.10350-1-anisinha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230630180423.558337-5-alex.bennee@linaro.org> |
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ca3fcdeeee |
net/vhost-net: do not assert on null pointer return from tap_get_vhost_net()
When 'vhost=off' or no vhost specific options at all are passed for the tap
net-device backend, tap_get_vhost_net() can return NULL. The function
net_init_tap_one() does not call vhost_net_init() on such cases and therefore
vhost_net pointer within the tap device state structure remains NULL. Hence,
assertion here on a NULL pointer return from tap_get_vhost_net() would not be
correct. Remove it and fix the crash generated by qemu upon initialization in
the following call chain :
qdev_realize() -> pci_qdev_realize() -> virtio_device_realize() ->
virtio_bus_device_plugged() -> virtio_net_get_features() -> get_vhost_net()
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Cédric Le Goater <clg@redhat.com>
Fixes:
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a0d7215e33 |
vhost-vdpa: do not cleanup the vdpa/vhost-net structures if peer nic is present
When a peer nic is still attached to the vdpa backend, it is too early to free up the vhost-net and vdpa structures. If these structures are freed here, then QEMU crashes when the guest is being shut down. The following call chain would result in an assertion failure since the pointer returned from vhost_vdpa_get_vhost_net() would be NULL: do_vm_stop() -> vm_state_notify() -> virtio_set_status() -> virtio_net_vhost_status() -> get_vhost_net(). Therefore, we defer freeing up the structures until at guest shutdown time when qemu_cleanup() calls net_cleanup() which then calls qemu_del_net_client() which would eventually call vhost_vdpa_cleanup() again to free up the structures. This time, the loop in net_cleanup() ensures that vhost_vdpa_cleanup() will be called one last time when all the peer nics are detached and freed. All unit tests pass with this change. CC: imammedo@redhat.com CC: jusual@redhat.com CC: mst@redhat.com Fixes: CVE-2023-3301 Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2128929 Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20230619065209.442185-1-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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0e994668d0 |
vhost_net: add an assertion for TAP client backends
An assertion was missing for tap vhost backends that enforces a non-null reference from get_vhost_net(). Both vhost-net-user and vhost-net-vdpa enforces this. Enforce the same for tap. Unit tests pass with this change. Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20230619041501.111655-1-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> |
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1afae3b881 |
acpi/tests/avocado/bits: enable bios bits avocado tests on gitlab CI pipeline
Biosbits avocado tests on gitlab has thus far been disabled because some
packages needed by this test was missing in the container images used by gitlab
CI. These packages have now been added with the commit:
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2a851fca9f |
docs/devel: remind developers to run CI container pipeline when updating images
When new dependencies and packages are added to containers, its important to run CI container generation pipelines on gitlab to make sure that there are no obvious conflicts between packages that are being added and those that are already present. Running CI container pipelines will make sure that there are no such breakages before we commit the change updating the containers. Add a line in the documentation reminding developers to run the pipeline before submitting the change. It will also ease the life of the maintainers. Signed-off-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20230506072012.10350-1-anisinha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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da9000784c |
tests/lcitool: Add mtools and xorriso and remove genisoimage as dependencies
Bios bits avocado tests need mformat (provided by the mtools package) and xorriso tools in order to run within gitlab CI containers. Add those dependencies within the Dockerfiles so that containers can be built with those tools present and bios bits avocado tests can be run there. xorriso package conflicts with genisoimage package on some distributions. Therefore, it is not possible to have both the packages at the same time in the container image uniformly for all distribution flavors. Further, on some distributions like RHEL, both xorriso and genisoimage packages provide /usr/bin/genisoimage and on some other distributions like Fedora, only genisoimage package provides the same utility. Therefore, this change removes the dependency on geninsoimage for building container images altogether keeping only xorriso package. At the same time, cdrom-test.c is updated to use and check for existence of only xorrisofs. Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20230504154611.85854-3-anisinha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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a19b119bd7 |
tests: libvirt-ci: Update to commit 'c8971e90ac' to pull in mformat and xorriso
Pull in the following changes from lcitool:
* tests/lcitool/libvirt-ci 85487e1...c8971e9 (18):
> mappings: add new package mappings for mformat and xorriso
> docs: testing: Update contents with tox
> .gitlab-ci.yml: Always test against installed lcitool
> gitlab-ci.yml: Start using tox for testing
> tox: Allow running with custom pytest options with {posargs}
> gitignore: Add the default .tox directory
> dev-requirements: Reference VM requirements
> requirements: Add tox to dev-requirements.txt and drop pytest and flake
> test-requirements: Rename to dev-requirements.txt
> Add tox.ini configuration file
> tests: commands: Consolidate the installed package/run from git tests
> Add a pytest.ini
> facts: targets: Drop Fedora 36 target
> gitlab-ci.yml: Add Fedora 38 target
> facts: targets: Add Fedora 38
> facts: mappings: Drop 'zstd' mapping
> facts: projects: nbdkit: Replace zstd mapping with libzstd
> docs: mappings: Add a section on the preferred mapping naming scheme
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Message-Id: <20230504154611.85854-2-anisinha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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1af507756b |
hw/acpi: limit warning on acpi table size to pc machines older than version 2.3
i440fx machine versions 2.3 and newer supports dynamic ram
resizing. See commit
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104593c3ad |
Add my old and new work email mapping and use work email to support acpi
Updating mailmap to indicate ani@anisinha.ca and anisinha@redhat.com are one and the same person. Also updating my email in MAINTAINERS for all my acpi work (reviewing patches and biosbits) to my work email. Also doing the same for bios bits test framework documentation. Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20230329040834.11973-1-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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607a079b29 |
Add my old and new work email mapping and use work email to support biosbits
Update mailmap to indicate ani@anisinha.ca and anisinha@redhat.com are one and the same person. Additionally update MAINTAINERS and bits documentation to use my work (redhat) email. Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20230320114233.90638-1-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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ffa175f22d |
acpi/tests/avocado/bits: add mformat as one of the dependencies
mformat is needed by grub-mkrescue and hence, add this as one of the dependencies to run bits tests. This avoids errors such as the following: /var/tmp/acpi-bits-wju6tqoa.tmp/grub-inst-x86_64-efi/bin/grub-mkrescue: 360: mformat: not found Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221203132407.34539-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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65809a60ec |
docs/acpi/bits: document BITS_DEBUG environment variable
Debug specific actions can be enabled in bios bits acpi tests by passing BITS_DEBUG in the environment variable while running the test. Document that. CC: qemu-trivial@nongnu.org Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221203132346.34479-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> |
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5a37392411 |
acpi/tests/avocado/bits: add SPDX license identifiers for bios bits tests
Added the SPDX license identifiers for biosbits tests. Also added a comment on each of the test scripts to indicate that they run from within the biosbits environment and hence are not subjected to the regular maintenance activities for QEMU and is excluded from the dependency management challenges in the host testing environment. Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Maydell Peter <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Tsirkin <mst@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: qemu-trivial@nongnu.org Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221125044138.962137-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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04e5bd441a |
acpi/tests/avocado/bits: keep the work directory when BITS_DEBUG is set in env
Debugging bits issue often involves running the QEMU command line manually outside of the avocado environment with the generated ISO. Hence, its inconvenient if the iso gets cleaned up after the test has finished. This change makes sure that the work directory is kept after the test finishes if the test is run with BITS_DEBUG=1 in the environment so that the iso is available for use with the QEMU command line. CC: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221117113630.543495-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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242a58cabe |
MAINTAINERS: add mst to list of biosbits maintainers
Adding Michael's name to the list of bios bits maintainers so that all changes and fixes into biosbits framework can go through his tree and he is notified. Suggested-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221111151138.36988-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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1b7a07c441 |
acpi/tests/avocado/bits: some misc fixes
Most of the changes are trivial. The bits test timeout has now been increased to 200 seconds in order to accommodate slower systems and fewer unnecessary failures. Removed of the reference to non-existent README file in docs. Some minor corrections in the doc file. Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221117053644.516649-1-ani@anisinha.ca> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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76f831dc6b |
MAINTAINERS: add myself as the maintainer for acpi biosbits avocado tests
I wrote the biosbits avocado tests for testing QEMU's ACPI/SMBIOS implementation and all the related changes including fixes in biosbits software itself. Making myself as the maintainer for QEMU's biosbits related files and test scripts. Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Maydell Peter <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221021095108.104843-8-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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a5ebaaf98c |
acpi/tests/avocado/bits/doc: add a doc file to describe the acpi bits test
A doc file is added under docs/devel that describes the purpose of the various test files and gives guidance to developers on where and how to make changes. Cc: Daniel P. Berrange" <berrange@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Maydell Peter <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221021095108.104843-7-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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77a8e24c5b |
acpi/tests/avocado/bits: add acpi and smbios avocado tests that uses biosbits
This introduces QEMU acpi/smbios biosbits avocado test which is run from within the python virtual environment. When the bits tests are run, bits binaries are downloaded from an external repo/location, bios bits iso is regenerated containing the acpi/smbios bits tests that are maintained as a part of the QEMU source under tests/avocado/acpi-bits/bits-test . When the VM is spawned with the iso, it runs the tests in batch mode and the results are pushed out from the VM to the test machine where they are analyzed by this script and pass/fail results are reported. Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Maydell Peter <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221021095108.104843-6-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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fa2cd84b22 |
acpi/tests/avocado/bits: add biosbits config file for running bios tests
This change adds initial biosbits config file that instructs biosbits to run bios test suits in batch mode. Additionally acpi and smbios structures are also dumped. Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Maydell Peter <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221021095108.104843-5-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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91cab435ec |
acpi/tests/avocado/bits: disable acpi PSS tests that are failing in biosbits
PSS tests in acpi test suite seems to be failing in biosbits. This is because the test is unable to find PSS support in QEMU bios. Let us disable them for now so that make check does not fail. We can fix the tests and re-enable them later. Example failure: ---- ACPI _PSS (Pstate) table conformance tests ---- [assert] _PSS must exist FAIL \_SB_.CPUS.C000 No _PSS exists Summary: 1 passed, 1 failed ---- ACPI _PSS (Pstate) runtime tests ---- [assert] _PSS must exist FAIL \_SB_.CPUS.C000 No _PSS exists Summary: 0 passed, 1 failed Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Maydell Peter <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221021095108.104843-4-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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87853babb3 |
acpi/tests/avocado/bits: initial commit of test scripts that are run by biosbits
This is initial commit of cpuid, acpi and smbios python test scripts for biosbits to execute. No change has been made to them from the original code written by the biosbits author Josh Triplett. They are required to be installed into the bits iso file and then run from within the virtual machine booted off with biosbits iso. The test scripts have a ".py2" extension in order to prevent avocado from loading them. They are written in python 2.7 and are run from within bios bits. There is no need for avocado to try to load them and call out errors on python3 specific syntaxes. The original location of these tests are here: https://github.com/biosbits/bits/blob/master/python/testacpi.py https://github.com/biosbits/bits/blob/master/python/smbios.py https://github.com/biosbits/bits/blob/master/python/testcpuid.py For QEMU, we maintain a fork of the above repo here with numerious fixes: https://gitlab.com/qemu-project/biosbits-bits The acpi test for example is maintained here in the fork: https://gitlab.com/qemu-project/biosbits-bits/-/raw/master/python/testacpi.py Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Maydell Peter <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Tsirkin <mst@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221021095108.104843-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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4ad08e8a57 |
hw/i386/e820: remove legacy reserved entries for e820
e820 reserved entries were used before the dynamic entries with fw config files
were intoduced. Please see the following change:
7d67110f2d9a6("pc: add etc/e820 fw_cfg file")
Identical support was introduced into seabios as well with the following commit:
ce39bd4031820 ("Add support for etc/e820 fw_cfg file")
Both the above commits are now quite old. QEMU machines 1.7 and newer no longer
use the reserved entries. Seabios uses fw config files and
dynamic e820 entries by default and only falls back to using reserved entries
when it has to work with old qemu (versions earlier than 1.7). Please see
functions qemu_cfg_e820() and qemu_early_e820(). It is safe to remove legacy
FW_CFG_E820_TABLE and associated code now as QEMU 7.0 has deprecated i440fx
machines 1.7 and older. It would be incredibly rare to run the latest qemu
version with a very old version of seabios that did not support fw config files
for e820.
As far as I could see, edk2/ovfm never supported reserved entries and uses fw
config files from the beginning. So there should be no incompatibilities with
ovfm as well.
CC: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20220831045311.33083-1-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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8c97e4deec |
acpi/erst: fix fallthrough code upon validation failure
At any step when any validation fail in check_erst_backend_storage(), there is no need to continue further through other validation checks. Further, by continuing even when record_size is 0, we run the risk of triggering a divide by zero error if we continued with other validation checks. Hence, we should simply return from this function upon validation failure. CC: Peter Maydell <peter.maydell@linaro.org> CC: Eric DeVolder <eric.devolder@oracle.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220513141005.1929422-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric DeVolder <eric.devolder@oracle.com> |
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128e050d41 |
hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present
The second bit of IAPC_BOOT_ARCH in FADT table indicates the presence of
keyboard controller implemented as 8042 or equivalent micro controller. This
change enables this flag for microvms if such a device exists (for example,
when added explicitly from the QEMU commandline). Change
654701e292d98b308b0 ("hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table")
enabled this flag for i386 q35 based machines. The reason for doing the same
for micro-vms is to make sure we provide the correct tables to the guest OS
uniformly in all cases when an i8042 device is present. When this bit is not
enabled, guest OSes has to find other indirect methods to detect the device
which we would like to avoid.
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20220304154032.2071585-5-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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63670bd3fc |
hw/smbios: add assertion to ensure handles of tables 19 and 32 do not collide
Since change dcf359832eec02 ("hw/smbios: fix table memory corruption with large memory vms")
we reserve additional space between handle numbers of tables 17 and 19 for
large VMs. This may cause table 19 to collide with table 32 in their handle
numbers for those large VMs. This change adds an assertion to ensure numbers
do not collide. If they do, qemu crashes with useful debug information for
taking additional steps.
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220223143322.927136-8-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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a379d4550c |
hw/smbios: fix overlapping table handle numbers with large memory vms
The current smbios table implementation splits the main memory in 16 GiB (DIMM like) chunks. With the current smbios table assignment code, we can have only 512 such chunks before the 16 bit handle numbers in the header for tables 17 and 19 conflict. A guest with more than 8 TiB of memory will hit this limitation and would fail with the following assertion in isa-debugcon: ASSERT_EFI_ERROR (Status = Already started) ASSERT /builddir/build/BUILD/edk2-ca407c7246bf/OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.c(125): !EFI_ERROR (Status) This change adds an additional offset between tables 17 and 19 handle numbers when configuring VMs larger than 8 TiB of memory. The value of the offset is calculated to be equal to the additional space required to be reserved in order to accomodate more DIMM entries without the table handles colliding. In normal cases where the VM memory is smaller or equal to 8 TiB, this offset value is 0. Hence in this case, no additional handle numbers are reserved and table handle values remain as before. Since smbios memory is not transmitted over the wire during migration, this change can break migration for large memory vms if the guest is in the middle of generating the tables during migration. However, in those situations, qemu generates invalid table handles anyway with or without this fix. Hence, we do not preserve the old bug by introducing compat knobs/machine types. Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2023977 Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220223143322.927136-7-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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3818acf564 |
hw/smbios: code cleanup - use macro definitions for table header handles
This is a minor cleanup. Using macro definitions makes the code more readable. It is at once clear which tables use which handle numbers in their header. It also makes it easy to calculate the gaps between the numbers and update them if needed. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220223143322.927136-6-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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f8bdfbdba9 |
hw/acpi/erst: clean up unused IS_UEFI_CPER_RECORD macro
This change is cosmetic. IS_UEFI_CPER_RECORD macro definition that was added as a part of the ERST implementation seems to be unused. Remove it. CC: Eric DeVolder <eric.devolder@oracle.com> Reviewed-by: Eric DeVolder <eric.devolder@oracle.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220223143322.927136-5-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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1665b4d510 |
docs/acpi/erst: add device id for ACPI ERST device in pci-ids.txt
Adding device ID for ERST device in pci-ids.txt. It was missed when ERST related patches were reviewed. CC: Eric DeVolder <eric.devolder@oracle.com> Reviewed-by: Eric DeVolder <eric.devolder@oracle.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220223143322.927136-4-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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2a06afec1f |
MAINTAINERS: no need to add my name explicitly as a reviewer for VIOT tables
I am already listed as a reviewer for ACPI/SMBIOS subsystem. There is no need to again add me as a reviewer for ACPI/VIOT. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220223143322.927136-3-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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48006e03d5 |
MAINTAINERS: Adding myself as a reviewer of some components
Added myself as a reviewer of vmgenid, unimplemented device and empty slot. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20220131122001.1476101-1-ani@anisinha.ca Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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784802689f |
acpihp: simplify acpi_pcihp_disable_root_bus
Get rid of the static variable that keeps track of whether hotplug has been disabled on the root pci bus. Simply use qbus_is_hotpluggable() api to perform the same check. This eliminates additional if conditional and simplifies the function. Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <1640764674-7784-1-git-send-email-ani@anirban.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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d135536d5f |
MAINTAINERS: Add a separate entry for acpi/VIOT tables
All work related to VIOT tables are being done by Jean. Adding him as the maintainer for acpi VIOT table code in qemu. Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20211213045924.344214-1-ani@anisinha.ca> Acked-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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a8339e07f9 |
tests/acpi/bios-tables-test: update DSDT blob for multifunction bridge test
We added a new unit test for testing acpi hotplug on multifunction bridges in
q35 machines. Here, we update the DSDT table gloden master blob for this unit
test.
The test adds the following devices to qemu and then checks the changes
introduced in the DSDT table due to the addition of the following devices:
(a) a multifunction bridge device
(b) a bridge device with function 1
(c) a non-bridge device with function 2
In the DSDT table, we should see AML hotplug descriptions for (a) and (b).
For (a) we should find a hotplug AML description for function 0.
Following is the ASL diff between the original DSDT table and the modified DSDT
table due to the unit test. We see that multifunction bridge on bus 2 and single
function bridge on bus 3 function 1 are described, not the non-bridge balloon
device on bus 4, function 2.
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Thu Oct 7 18:29:19 2021
+ * Disassembly of /tmp/aml-C7JCA1, Thu Oct 7 18:29:19 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00002061 (8289)
+ * Length 0x00002187 (8583)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xF9
+ * Checksum 0x8D
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3265,23 +3265,95 @@
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ Name (BSEL, One)
+ Device (S00)
+ {
+ Name (_SUN, Zero) // _SUN: Slot User Number
+ Name (_ADR, Zero) // _ADR: Address
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ PCEJ (BSEL, _SUN)
+ }
+
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN))
+ }
+ }
+
+ Method (DVNT, 2, NotSerialized)
+ {
+ If ((Arg0 & One))
+ {
+ Notify (S00, Arg1)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = One
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
+ Device (S19)
+ {
+ Name (_ADR, 0x00030001) // _ADR: Address
+ Name (BSEL, Zero)
+ Device (S00)
+ {
+ Name (_SUN, Zero) // _SUN: Slot User Number
+ Name (_ADR, Zero) // _ADR: Address
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ PCEJ (BSEL, _SUN)
+ }
+
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN))
+ }
+ }
+
+ Method (DVNT, 2, NotSerialized)
+ {
+ If ((Arg0 & One))
+ {
+ Notify (S00, Arg1)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = Zero
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
Method (PCNT, 0, NotSerialized)
{
+ ^S19.PCNT ()
+ ^S10.PCNT ()
}
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20211007135750.1277213-4-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
|
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04dd78b9e8 |
tests/acpi/pcihp: add unit tests for hotplug on multifunction bridges for q35
commit |
||
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6dcb1cc951 |
tests/acpi/bios-tables-test: add and allow changes to a new q35 DSDT table blob
We are adding a new unit test to cover the acpi hotplug support in q35 for multi-function bridges. This test uses a new table DSDT.multi-bridge. We need to allow changes in DSDT acpi table for addition of this new unit test. Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20211007135750.1277213-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> |
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500eb21cff |
bios-tables-test: Update ACPI DSDT table golden blobs for q35
We have modified the IO address range for ACPI pci hotplug in q35. See change:
5adcc9e39e6a5 ("hw/i386/acpi: fix conflicting IO address range for acpi pci hotplug in q35")
The ACPI DSDT table golden blobs must be regenrated in order to make the unit tests
pass. This change updates the golden ACPI DSDT table blobs.
Following is the ASL diff between the blobs:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Tue Sep 14 09:04:06 2021
+ * Disassembly of /tmp/aml-52DP90, Tue Sep 14 09:04:06 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002061 (8289)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xE5
+ * Checksum 0xF9
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -226,46 +226,46 @@
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{8}
})
}
}
Scope (_SB.PCI0)
{
- OperationRegion (PCST, SystemIO, 0x0CC4, 0x08)
+ OperationRegion (PCST, SystemIO, 0x0CC0, 0x08)
Field (PCST, DWordAcc, NoLock, WriteAsZeros)
{
PCIU, 32,
PCID, 32
}
- OperationRegion (SEJ, SystemIO, 0x0CCC, 0x04)
+ OperationRegion (SEJ, SystemIO, 0x0CC8, 0x04)
Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
{
B0EJ, 32
}
- OperationRegion (BNMR, SystemIO, 0x0CD4, 0x08)
+ OperationRegion (BNMR, SystemIO, 0x0CD0, 0x08)
Field (BNMR, DWordAcc, NoLock, WriteAsZeros)
{
BNUM, 32,
PIDX, 32
}
Mutex (BLCK, 0x00)
Method (PCEJ, 2, NotSerialized)
{
Acquire (BLCK, 0xFFFF)
BNUM = Arg0
B0EJ = (One << Arg1)
Release (BLCK)
Return (Zero)
}
@@ -3185,34 +3185,34 @@
0x0620, // Range Minimum
0x0620, // Range Maximum
0x01, // Alignment
0x10, // Length
)
})
}
Device (PHPR)
{
Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID
Name (_UID, "PCI Hotplug resources") // _UID: Unique ID
Name (_STA, 0x0B) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
- 0x0CC4, // Range Minimum
- 0x0CC4, // Range Maximum
+ 0x0CC0, // Range Minimum
+ 0x0CC0, // Range Maximum
0x01, // Alignment
0x18, // Length
)
})
}
}
Scope (\)
{
Name (_S3, Package (0x04) // _S3_: S3 System State
{
One,
One,
Zero,
Zero
})
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20210916132838.3469580-4-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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0e780da76a |
hw/i386/acpi: fix conflicting IO address range for acpi pci hotplug in q35
Change |
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9f29e872d5 |
bios-tables-test: allow changes in DSDT ACPI tables for q35
We are going to commit a change to fix IO address range allocated for acpi pci hotplug in q35. This affects DSDT tables. This change allows DSDT table modification so that unit tests are not broken. Signed-off-by: Ani Sinha <ani@anisinha.ca> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210916132838.3469580-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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c2ea98c317 |
MAINTAINERS: Added myself as a reviewer for acpi/smbios subsystem
I have developed an interest in this space and hopefully can lend some helping hand to Igor and Michael in reviewing simpler patches. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210825031949.919376-4-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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028f1a88ab |
hw/acpi: use existing references to pci device struct within functions
There is no need to use fresh typecasts to get references to pci device structs when there is an existing reference to pci device struct. Use existing reference. Minor cleanup. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210825031949.919376-3-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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6c1ebe75ae |
hw/pci: remove all references to find_i440fx function
commit
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fe8adae345 |
hw/acpi: refactor acpi hp modules so that targets can just use what they need
Currently various acpi hotplug modules like cpu hotplug, memory hotplug, pci hotplug, nvdimm hotplug are all pulled in when CONFIG_ACPI_X86 is turned on. This brings in support for whole lot of subsystems that some targets like mips does not need. They are added just to satisfy symbol dependencies. This is ugly and should be avoided. Targets should be able to pull in just what they need and no more. For example, mips only needs support for PIIX4 and does not need acpi pci hotplug support or cpu hotplug support or memory hotplug support etc. This change is an effort to clean this up. In this change, new config variables are added for various acpi hotplug subsystems. Targets like mips can only enable PIIX4 support and not the rest of all the other modules which were being previously pulled in as a part of CONFIG_ACPI_X86. Function stubs make sure that symbols which piix4 needs but are not required by mips (for example, symbols specific to pci hotplug etc) are available to satisfy the dependencies. Currently, this change only addresses issues with mips malta targets. In future we might be able to clean up other targets which are similarly pulling in lot of unnecessary hotplug modules by enabling ACPI_X86. This change should also address issues such as the following: https://gitlab.com/qemu-project/qemu/-/issues/221 https://gitlab.com/qemu-project/qemu/-/issues/193 Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20210812071409.492299-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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aa29466b48 |
hw/acpi: define PIIX4 acpi pci hotplug property strings at a single place
Now that we have "acpi-pci-hotplug-with-bridge-support" PIIX4 PM property being used for both q35 and i440fx machine types, it is better that we defined this property string at a single place within a header file like other PIIX4 properties. We can then use this single definition at all the places that needs it instead of duplicating the string everywhere. While at it, this change also adds a definition for "acpi-root-pci-hotplug" PIIX4 PM property and uses this definition at all places that were formally using the string value. Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20210816083214.105740-1-ani@anisinha.ca> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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0659e4680e |
hw/arm/Kconfig: no need to enable ACPI_MEMORY_HOTPLUG/ACPI_NVDIMM explicitly
Since commit
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1bf8b88f14 |
qom: code hardening - have bound checking while looping with integer value
Object property insertion code iterates over an integer to get an unused index that can be used as an unique name for an object property. This loop increments the integer value indefinitely. Although very unlikely, this can still cause an integer overflow. In this change, we fix the above code by checking against INT16_MAX and making sure that the interger index does not overflow beyond that value. If no available index is found, the code would cause an assertion failure. This assertion failure is necessary because the callers of the function do not check the return value for NULL. Signed-off-by: Ani Sinha <ani@anisinha.ca> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200921093325.25617-1-ani@anisinha.ca> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> |
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4acfca29db |
Adding ani's email as an individual contributor
Ani is an individual contributor into qemu project. Adding my email into the correct file to reflect so. Signed-off-by: Ani Sinha <ani@anisinha.ca> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201007161940.1478-1-ani@anisinha.ca> Message-Id: <20201021163136.27324-2-alex.bennee@linaro.org> |
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07f5903c85 |
Add a comment in bios-tables-test.c to clarify the reason behind approach
A comment is added in bios-tables-test.c that explains the reasoning behind the process of updating the ACPI table blobs when new tests are added or old tests are modified or code is committed that affect tests. The explanation would help future contributors follow the correct process when making code changes that affect ACPI tables. Signed-off-by: Ani Sinha <ani@anisinha.ca> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200929142501.1057-1-ani@anisinha.ca> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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4280355231 |
tests/acpi: add DSDT.hpbrroot DSDT table blob to test global i440fx hotplug
This change adds a new DSDT golden master table blob to test disabling
hotplug on both pci root bus and pci bridges. Also reverts the change
in file bios-tables-test-allowed-diff.h to make sure its now empty so that
future modifications to acpi tables can be caught.
The following is the disassembled diff between DSDT.hpbridge and DSDT.hpbrroot:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbridge, Tue Sep 29 17:51:04 2020
+ * Disassembly of tests/data/acpi/pc/DSDT.hpbrroot, Tue Sep 29 17:50:00 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000139D (5021)
+ * Length 0x00000C07 (3079)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x05
+ * Checksum 0xAD
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -247,38 +247,6 @@
}
}
- Scope (_SB.PCI0)
- {
- OperationRegion (PCST, SystemIO, 0xAE00, 0x08)
- Field (PCST, DWordAcc, NoLock, WriteAsZeros)
- {
- PCIU, 32,
- PCID, 32
- }
-
- OperationRegion (SEJ, SystemIO, 0xAE08, 0x04)
- Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
- {
- B0EJ, 32
- }
-
- OperationRegion (BNMR, SystemIO, 0xAE10, 0x04)
- Field (BNMR, DWordAcc, NoLock, WriteAsZeros)
- {
- BNUM, 32
- }
-
- Mutex (BLCK, 0x00)
- Method (PCEJ, 2, NotSerialized)
- {
- Acquire (BLCK, 0xFFFF)
- BNUM = Arg0
- B0EJ = (One << Arg1)
- Release (BLCK)
- Return (Zero)
- }
- }
-
Scope (_SB)
{
Scope (PCI0)
@@ -737,12 +705,6 @@
Scope (_GPE)
{
Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID
- Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE
- {
- Acquire (\_SB.PCI0.BLCK, 0xFFFF)
- \_SB.PCI0.PCNT ()
- Release (\_SB.PCI0.BLCK)
- }
}
Scope (\_SB.PCI0)
@@ -813,22 +775,6 @@
)
})
}
-
- Device (PHPR)
- {
- Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID
- Name (_UID, "PCI Hotplug resources") // _UID: Unique ID
- Name (_STA, 0x0B) // _STA: Status
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- IO (Decode16,
- 0xAE00, // Range Minimum
- 0xAE00, // Range Maximum
- 0x01, // Alignment
- 0x14, // Length
- )
- })
- }
}
Scope (\)
@@ -878,7 +824,6 @@
{
Scope (PCI0)
{
- Name (BSEL, Zero)
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
@@ -907,436 +852,6 @@
{
Name (_ADR, 0x00030000) // _ADR: Address
}
-
- Device (S20)
- {
- Name (_SUN, 0x04) // _SUN: Slot User Number
- Name (_ADR, 0x00040000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S28)
- {
- Name (_SUN, 0x05) // _SUN: Slot User Number
- Name (_ADR, 0x00050000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S30)
- {
- Name (_SUN, 0x06) // _SUN: Slot User Number
- Name (_ADR, 0x00060000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S38)
- {
- Name (_SUN, 0x07) // _SUN: Slot User Number
- Name (_ADR, 0x00070000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S40)
- {
- Name (_SUN, 0x08) // _SUN: Slot User Number
- Name (_ADR, 0x00080000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S48)
- {
- Name (_SUN, 0x09) // _SUN: Slot User Number
- Name (_ADR, 0x00090000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S50)
- {
- Name (_SUN, 0x0A) // _SUN: Slot User Number
- Name (_ADR, 0x000A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S58)
- {
- Name (_SUN, 0x0B) // _SUN: Slot User Number
- Name (_ADR, 0x000B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S60)
- {
- Name (_SUN, 0x0C) // _SUN: Slot User Number
- Name (_ADR, 0x000C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S68)
- {
- Name (_SUN, 0x0D) // _SUN: Slot User Number
- Name (_ADR, 0x000D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S70)
- {
- Name (_SUN, 0x0E) // _SUN: Slot User Number
- Name (_ADR, 0x000E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S78)
- {
- Name (_SUN, 0x0F) // _SUN: Slot User Number
- Name (_ADR, 0x000F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S80)
- {
- Name (_SUN, 0x10) // _SUN: Slot User Number
- Name (_ADR, 0x00100000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S88)
- {
- Name (_SUN, 0x11) // _SUN: Slot User Number
- Name (_ADR, 0x00110000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S90)
- {
- Name (_SUN, 0x12) // _SUN: Slot User Number
- Name (_ADR, 0x00120000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S98)
- {
- Name (_SUN, 0x13) // _SUN: Slot User Number
- Name (_ADR, 0x00130000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA0)
- {
- Name (_SUN, 0x14) // _SUN: Slot User Number
- Name (_ADR, 0x00140000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA8)
- {
- Name (_SUN, 0x15) // _SUN: Slot User Number
- Name (_ADR, 0x00150000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB0)
- {
- Name (_SUN, 0x16) // _SUN: Slot User Number
- Name (_ADR, 0x00160000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB8)
- {
- Name (_SUN, 0x17) // _SUN: Slot User Number
- Name (_ADR, 0x00170000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC0)
- {
- Name (_SUN, 0x18) // _SUN: Slot User Number
- Name (_ADR, 0x00180000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC8)
- {
- Name (_SUN, 0x19) // _SUN: Slot User Number
- Name (_ADR, 0x00190000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD0)
- {
- Name (_SUN, 0x1A) // _SUN: Slot User Number
- Name (_ADR, 0x001A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD8)
- {
- Name (_SUN, 0x1B) // _SUN: Slot User Number
- Name (_ADR, 0x001B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE0)
- {
- Name (_SUN, 0x1C) // _SUN: Slot User Number
- Name (_ADR, 0x001C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE8)
- {
- Name (_SUN, 0x1D) // _SUN: Slot User Number
- Name (_ADR, 0x001D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF0)
- {
- Name (_SUN, 0x1E) // _SUN: Slot User Number
- Name (_ADR, 0x001E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF8)
- {
- Name (_SUN, 0x1F) // _SUN: Slot User Number
- Name (_ADR, 0x001F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Method (DVNT, 2, NotSerialized)
- {
- If ((Arg0 & 0x10))
- {
- Notify (S20, Arg1)
- }
-
- If ((Arg0 & 0x20))
- {
- Notify (S28, Arg1)
- }
-
- If ((Arg0 & 0x40))
- {
- Notify (S30, Arg1)
- }
-
- If ((Arg0 & 0x80))
- {
- Notify (S38, Arg1)
- }
-
- If ((Arg0 & 0x0100))
- {
- Notify (S40, Arg1)
- }
-
- If ((Arg0 & 0x0200))
- {
- Notify (S48, Arg1)
- }
-
- If ((Arg0 & 0x0400))
- {
- Notify (S50, Arg1)
- }
-
- If ((Arg0 & 0x0800))
- {
- Notify (S58, Arg1)
- }
-
- If ((Arg0 & 0x1000))
- {
- Notify (S60, Arg1)
- }
-
- If ((Arg0 & 0x2000))
- {
- Notify (S68, Arg1)
- }
-
- If ((Arg0 & 0x4000))
- {
- Notify (S70, Arg1)
- }
-
- If ((Arg0 & 0x8000))
- {
- Notify (S78, Arg1)
- }
-
- If ((Arg0 & 0x00010000))
- {
- Notify (S80, Arg1)
- }
-
- If ((Arg0 & 0x00020000))
- {
- Notify (S88, Arg1)
- }
-
- If ((Arg0 & 0x00040000))
- {
- Notify (S90, Arg1)
- }
-
- If ((Arg0 & 0x00080000))
- {
- Notify (S98, Arg1)
- }
-
- If ((Arg0 & 0x00100000))
- {
- Notify (SA0, Arg1)
- }
-
- If ((Arg0 & 0x00200000))
- {
- Notify (SA8, Arg1)
- }
-
- If ((Arg0 & 0x00400000))
- {
- Notify (SB0, Arg1)
- }
-
- If ((Arg0 & 0x00800000))
- {
- Notify (SB8, Arg1)
- }
-
- If ((Arg0 & 0x01000000))
- {
- Notify (SC0, Arg1)
- }
-
- If ((Arg0 & 0x02000000))
- {
- Notify (SC8, Arg1)
- }
-
- If ((Arg0 & 0x04000000))
- {
- Notify (SD0, Arg1)
- }
-
- If ((Arg0 & 0x08000000))
- {
- Notify (SD8, Arg1)
- }
-
- If ((Arg0 & 0x10000000))
- {
- Notify (SE0, Arg1)
- }
-
- If ((Arg0 & 0x20000000))
- {
- Notify (SE8, Arg1)
- }
-
- If ((Arg0 & 0x40000000))
- {
- Notify (SF0, Arg1)
- }
-
- If ((Arg0 & 0x80000000))
- {
- Notify (SF8, Arg1)
- }
- }
-
- Method (PCNT, 0, NotSerialized)
- {
- BNUM = Zero
- DVNT (PCIU, One)
- DVNT (PCID, 0x03)
- }
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200929123011.31836-3-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
|
5645f99690 |
tests/acpi: unit test exercising global pci hotplug off for i440fx
This change adds a unit test to exercise the case when hotplug is disabled both for pci root bus and the pci bridges by passing the following two switches to qemu: -global PIIX4_PM.acpi-root-pci-hotplug=off -global PIIX4_PM.acpi-pci-hotplug-with-bridge-support=off bios-tables-test-allowed-diff.h documents the fact that a new DSDT acpi gold master binary blob we need to be added to test this. We will do the actual addition in the next patch in the series. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200929123011.31836-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
|
0ed93f4c05 |
tests/acpi: update golden master DSDT binary table blobs for q35
In the previously applied commit ("piix4: don't reserve hw resources when
hotplug is off globally"), we make changes to the ACPI DSDT tables
such that some ACPI code are not generated when bsel is absent. Since
as of this point in time, in q35 machines, we do not use bsel for pci
buses, we need to update the DSDT table blobs.
This patch updates the DSDT golden master tables for q35 machines.
At the same time, we clear bios-tables-test-allowed-diff.h for future
changes which update tables.
Following is a typical diff between the q35 acpi DSDT table blobs:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180105 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Tue Sep 15 18:52:47 2020
+ * Disassembly of /tmp/aml-3O0DR0, Tue Sep 15 18:52:47 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001DFE (7678)
+ * Length 0x00001DF6 (7670)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xAC
+ * Checksum 0x17
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3113,24 +3113,20 @@
Name (_ADR, 0x00010000) // _ADR: Address
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
-
- Method (PCNT, 0, NotSerialized)
- {
- }
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-12-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
|
df4008c9c5 |
piix4: don't reserve hw resources when hotplug is off globally
When acpi hotplug is turned off for both root pci bus as well as for pci bridges, we should not generate the related ACPI code for DSDT table or initialize related hw ports or reserve hw resources. This change makes sure all those operations are turned off in the case ACPI pci hotplug is off globally. In this change, we also make sure ACPI code for the PCNT method are only added when bsel is enabled for the corresponding pci bus or bridge hotplug is turned on. As q35 machines do not use bsel for it's pci buses at this point in time, this change affects DSDT acpi table for q35 machines as well. Therefore, we will also need to commit the updated golden master DSDT table acpi binary blobs as well. Following is the list of blobs which needs updating: tests/data/acpi/q35/DSDT tests/data/acpi/q35/DSDT.acpihmat tests/data/acpi/q35/DSDT.bridge tests/data/acpi/q35/DSDT.cphp tests/data/acpi/q35/DSDT.dimmpxm tests/data/acpi/q35/DSDT.ipmibt tests/data/acpi/q35/DSDT.memhp tests/data/acpi/q35/DSDT.mmio64 tests/data/acpi/q35/DSDT.numamem tests/data/acpi/q35/DSDT.tis These tables are updated in the following commit. Without the updated table blobs, the unit tests would fail with this patch. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200918084111.15339-11-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
|
c4bb646ffb |
Add ACPI DSDT tables for q35 that are being updated by the next patch
The following patch ("piix4: don't reserve hw resources when
hotplug is off globally") modifies certain ACPI tables for q35 machines.
This patch adds those table names to tests/qtest/bios-tables-test-allowed-diff.h
so that unit tests continue to pass and bisection is not broken.
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-10-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
|
8b434b031f |
tests/acpi: add newly added acpi DSDT table blob for pci bridge hotplug flag
This patch adds a binary blob corresponding to the DSDT acpi table. It is used
to unit test the flag 'acpi-pci-hotplug-with-bridge-support' used with pci
bridges.
This change also clears the file tests/qtest/bios-tables-test-allowed-diff.h
so that future changes which affect the table can be caught.
The following is the diff between files tests/data/acpi/pc/DSDT.bridge and
tests/data/acpi/pc/DSDT.hpbridge after disassembly :
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180105 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.bridge, Fri Sep 11 23:21:34 2020
+ * Disassembly of /tmp/aml-7UURQ0, Fri Sep 11 23:21:34 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A89 (6793)
+ * Length 0x0000131F (4895)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x09
+ * Checksum 0xF9
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -859,522 +859,32 @@
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
- Name (BSEL, One)
- Device (S00)
- {
- Name (_SUN, Zero) // _SUN: Slot User Number
- Name (_ADR, Zero) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S08)
- {
- Name (_SUN, One) // _SUN: Slot User Number
- Name (_ADR, 0x00010000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S10)
- {
- Name (_SUN, 0x02) // _SUN: Slot User Number
- Name (_ADR, 0x00020000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S18)
- {
- Name (_SUN, 0x03) // _SUN: Slot User Number
- Name (_ADR, 0x00030000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S20)
- {
- Name (_SUN, 0x04) // _SUN: Slot User Number
- Name (_ADR, 0x00040000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S28)
- {
- Name (_SUN, 0x05) // _SUN: Slot User Number
- Name (_ADR, 0x00050000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S30)
- {
- Name (_SUN, 0x06) // _SUN: Slot User Number
- Name (_ADR, 0x00060000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S38)
- {
- Name (_SUN, 0x07) // _SUN: Slot User Number
- Name (_ADR, 0x00070000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S40)
- {
- Name (_SUN, 0x08) // _SUN: Slot User Number
- Name (_ADR, 0x00080000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S48)
- {
- Name (_SUN, 0x09) // _SUN: Slot User Number
- Name (_ADR, 0x00090000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S50)
- {
- Name (_SUN, 0x0A) // _SUN: Slot User Number
- Name (_ADR, 0x000A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S58)
- {
- Name (_SUN, 0x0B) // _SUN: Slot User Number
- Name (_ADR, 0x000B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S60)
- {
- Name (_SUN, 0x0C) // _SUN: Slot User Number
- Name (_ADR, 0x000C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S68)
- {
- Name (_SUN, 0x0D) // _SUN: Slot User Number
- Name (_ADR, 0x000D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S70)
- {
- Name (_SUN, 0x0E) // _SUN: Slot User Number
- Name (_ADR, 0x000E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S78)
- {
- Name (_SUN, 0x0F) // _SUN: Slot User Number
- Name (_ADR, 0x000F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S80)
- {
- Name (_SUN, 0x10) // _SUN: Slot User Number
- Name (_ADR, 0x00100000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S88)
- {
- Name (_SUN, 0x11) // _SUN: Slot User Number
- Name (_ADR, 0x00110000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S90)
- {
- Name (_SUN, 0x12) // _SUN: Slot User Number
- Name (_ADR, 0x00120000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S98)
- {
- Name (_SUN, 0x13) // _SUN: Slot User Number
- Name (_ADR, 0x00130000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA0)
- {
- Name (_SUN, 0x14) // _SUN: Slot User Number
- Name (_ADR, 0x00140000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA8)
- {
- Name (_SUN, 0x15) // _SUN: Slot User Number
- Name (_ADR, 0x00150000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB0)
- {
- Name (_SUN, 0x16) // _SUN: Slot User Number
- Name (_ADR, 0x00160000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB8)
- {
- Name (_SUN, 0x17) // _SUN: Slot User Number
- Name (_ADR, 0x00170000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC0)
- {
- Name (_SUN, 0x18) // _SUN: Slot User Number
- Name (_ADR, 0x00180000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC8)
- {
- Name (_SUN, 0x19) // _SUN: Slot User Number
- Name (_ADR, 0x00190000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD0)
- {
- Name (_SUN, 0x1A) // _SUN: Slot User Number
- Name (_ADR, 0x001A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD8)
- {
- Name (_SUN, 0x1B) // _SUN: Slot User Number
- Name (_ADR, 0x001B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE0)
- {
- Name (_SUN, 0x1C) // _SUN: Slot User Number
- Name (_ADR, 0x001C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE8)
- {
- Name (_SUN, 0x1D) // _SUN: Slot User Number
- Name (_ADR, 0x001D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF0)
- {
- Name (_SUN, 0x1E) // _SUN: Slot User Number
- Name (_ADR, 0x001E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF8)
- {
- Name (_SUN, 0x1F) // _SUN: Slot User Number
- Name (_ADR, 0x001F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Method (DVNT, 2, NotSerialized)
- {
- If ((Arg0 & One))
- {
- Notify (S00, Arg1)
- }
-
- If ((Arg0 & 0x02))
- {
- Notify (S08, Arg1)
- }
-
- If ((Arg0 & 0x04))
- {
- Notify (S10, Arg1)
- }
-
- If ((Arg0 & 0x08))
- {
- Notify (S18, Arg1)
- }
-
- If ((Arg0 & 0x10))
- {
- Notify (S20, Arg1)
- }
-
- If ((Arg0 & 0x20))
- {
- Notify (S28, Arg1)
- }
-
- If ((Arg0 & 0x40))
- {
- Notify (S30, Arg1)
- }
-
- If ((Arg0 & 0x80))
- {
- Notify (S38, Arg1)
- }
-
- If ((Arg0 & 0x0100))
- {
- Notify (S40, Arg1)
- }
-
- If ((Arg0 & 0x0200))
- {
- Notify (S48, Arg1)
- }
-
- If ((Arg0 & 0x0400))
- {
- Notify (S50, Arg1)
- }
-
- If ((Arg0 & 0x0800))
- {
- Notify (S58, Arg1)
- }
-
- If ((Arg0 & 0x1000))
- {
- Notify (S60, Arg1)
- }
-
- If ((Arg0 & 0x2000))
- {
- Notify (S68, Arg1)
- }
-
- If ((Arg0 & 0x4000))
- {
- Notify (S70, Arg1)
- }
-
- If ((Arg0 & 0x8000))
- {
- Notify (S78, Arg1)
- }
-
- If ((Arg0 & 0x00010000))
- {
- Notify (S80, Arg1)
- }
-
- If ((Arg0 & 0x00020000))
- {
- Notify (S88, Arg1)
- }
-
- If ((Arg0 & 0x00040000))
- {
- Notify (S90, Arg1)
- }
-
- If ((Arg0 & 0x00080000))
- {
- Notify (S98, Arg1)
- }
-
- If ((Arg0 & 0x00100000))
- {
- Notify (SA0, Arg1)
- }
-
- If ((Arg0 & 0x00200000))
- {
- Notify (SA8, Arg1)
- }
-
- If ((Arg0 & 0x00400000))
- {
- Notify (SB0, Arg1)
- }
-
- If ((Arg0 & 0x00800000))
- {
- Notify (SB8, Arg1)
- }
-
- If ((Arg0 & 0x01000000))
- {
- Notify (SC0, Arg1)
- }
-
- If ((Arg0 & 0x02000000))
- {
- Notify (SC8, Arg1)
- }
-
- If ((Arg0 & 0x04000000))
- {
- Notify (SD0, Arg1)
- }
-
- If ((Arg0 & 0x08000000))
- {
- Notify (SD8, Arg1)
- }
-
- If ((Arg0 & 0x10000000))
- {
- Notify (SE0, Arg1)
- }
-
- If ((Arg0 & 0x20000000))
- {
- Notify (SE8, Arg1)
- }
-
- If ((Arg0 & 0x40000000))
- {
- Notify (SF0, Arg1)
- }
-
- If ((Arg0 & 0x80000000))
- {
- Notify (SF8, Arg1)
- }
- }
-
- Method (PCNT, 0, NotSerialized)
- {
- BNUM = One
- DVNT (PCIU, One)
- DVNT (PCID, 0x03)
- }
}
Device (S20)
{
Name (_SUN, 0x04) // _SUN: Slot User Number
Name (_ADR, 0x00040000) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
}
}
Device (S28)
{
Name (_SUN, 0x05) // _SUN: Slot User Number
Name (_ADR, 0x00050000) // _ADR: Address
@@ -1779,22 +1289,21 @@
If ((Arg0 & 0x40000000))
{
Notify (SF0, Arg1)
}
If ((Arg0 & 0x80000000))
{
Notify (SF8, Arg1)
}
}
Method (PCNT, 0, NotSerialized)
{
BNUM = Zero
DVNT (PCIU, One)
DVNT (PCID, 0x03)
- ^S18.PCNT ()
}
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-9-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
|
5e3a486211 |
tests/acpi: unit test for 'acpi-pci-hotplug-with-bridge-support' bridge flag
This change adds a new unit test for the global flag 'acpi-pci-hotplug-with-bridge-support' which is available for cold plugged pci bridges in i440fx. The flag can be used to turn off ACPI based hotplug support on all pci bridges. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200918084111.15339-8-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
|
0fb41e8987 |
tests/acpi: list added acpi table binary file for pci bridge hotplug test
The file 'tests/data/acpi/pc/DSDT.hpbridge' is a newly added acpi table file for testing the pci bridge option 'acpi-pci-hotplug-with-bridge-support' under i440fx. This change documents this fact. Signed-off-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200918084111.15339-7-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
|
15a5b25408 |
i440fx/acpi: do not add hotplug related amls for cold plugged bridges
Cold plugged bridges are not hot unpluggable, even when their hotplug
property (acpi-pci-hotplug-with-bridge-support) is turned off. Please see
the function acpi_pcihp_pc_no_hotplug(). However, with
the current implementaton, Windows would try to hot-unplug a pci bridge when
it's hotplug switch is off. This is regardless of whether there are devices
attached to the bridge. This is because we add ACPI code like _EJ0 etc for the
pci slot where the bridge is cold plugged.
In this fix, we identify a cold plugged bridge and for cold plugged bridges,
we do not add the appropriate ACPI methods that are used by the OS
to identify a hot-pluggable/unpluggable pci device. After this change, Windows
does not detect the cold plugged pci bridge as ejectable.
As a result of the patch, the following are the changes to the DSDT ACPI
table:
@@ -858,38 +858,33 @@
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
Device (S18)
{
- Name (_SUN, 0x03) // _SUN: Slot User Number
Name (_ADR, 0x00030000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
}
Device (S20)
{
Name (_SUN, 0x04) // _SUN: Slot User Number
Name (_ADR, 0x00040000) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
}
}
Device (S28)
{
Name (_SUN, 0x05) // _SUN: Slot User Number
Name (_ADR, 0x00050000) // _ADR: Address
@@ -1148,37 +1143,32 @@
PCEJ (BSEL, _SUN)
}
}
Device (SF8)
{
Name (_SUN, 0x1F) // _SUN: Slot User Number
Name (_ADR, 0x001F0000) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
}
}
Method (DVNT, 2, NotSerialized)
{
- If ((Arg0 & 0x08))
- {
- Notify (S18, Arg1)
- }
-
If ((Arg0 & 0x10))
{
Notify (S20, Arg1)
}
If ((Arg0 & 0x20))
{
Notify (S28, Arg1)
}
If ((Arg0 & 0x40))
{
Notify (S30, Arg1)
}
If ((Arg0 & 0x80))
While at it, I have also updated a stale comment.
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Suggested-by: Julia Suvorova <jusual@redhat.com>
Reviewed-by: Julia Suvorova <jusual@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-6-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
|
8ad038abb9 |
Fix a gap where acpi_pcihp_find_hotplug_bus() returns a non-hotpluggable bus
When ACPI hotplug for the root bus is disabled, the bsel property for that
bus is not set. Please see the following commit:
|
||
|
|
df00a52972 |
tests/acpi: add a new ACPI table in order to test root pci hotplug on/off
A new binary ACPI table tests/data/acpi/pc/DSDT.roothp is added in order
to unit test hotplug on/off capability on the root pci bus for i440fx.
The diff between the table DSDT.bridge and DSDT.roothp is listed below:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180105 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.bridge, Fri Sep 11 22:51:04 2020
+ * Disassembly of /tmp/aml-UGIHQ0, Fri Sep 11 22:51:04 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A89 (6793)
+ * Length 0x0000140A (5130)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x09
+ * Checksum 0xE6
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -831,61 +831,60 @@
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0510, // Range Minimum
0x0510, // Range Maximum
0x01, // Alignment
0x0C, // Length
)
})
}
}
Scope (\_SB)
{
Scope (PCI0)
{
- Name (BSEL, Zero)
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (S10)
{
Name (_ADR, 0x00020000) // _ADR: Address
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
- Name (BSEL, One)
+ Name (BSEL, Zero)
Device (S00)
{
Name (_SUN, Zero) // _SUN: Slot User Number
Name (_ADR, Zero) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
PCEJ (BSEL, _SUN)
}
}
Device (S08)
{
Name (_SUN, One) // _SUN: Slot User Number
Name (_ADR, 0x00010000) // _ADR: Address
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
@@ -1345,456 +1344,30 @@
Notify (SE8, Arg1)
}
If ((Arg0 & 0x40000000))
{
Notify (SF0, Arg1)
}
If ((Arg0 & 0x80000000))
{
Notify (SF8, Arg1)
}
}
Method (PCNT, 0, NotSerialized)
{
- BNUM = One
+ BNUM = Zero
DVNT (PCIU, One)
DVNT (PCID, 0x03)
}
}
- Device (S20)
- {
- Name (_SUN, 0x04) // _SUN: Slot User Number
- Name (_ADR, 0x00040000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S28)
- {
- Name (_SUN, 0x05) // _SUN: Slot User Number
- Name (_ADR, 0x00050000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S30)
- {
- Name (_SUN, 0x06) // _SUN: Slot User Number
- Name (_ADR, 0x00060000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S38)
- {
- Name (_SUN, 0x07) // _SUN: Slot User Number
- Name (_ADR, 0x00070000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S40)
- {
- Name (_SUN, 0x08) // _SUN: Slot User Number
- Name (_ADR, 0x00080000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S48)
- {
- Name (_SUN, 0x09) // _SUN: Slot User Number
- Name (_ADR, 0x00090000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S50)
- {
- Name (_SUN, 0x0A) // _SUN: Slot User Number
- Name (_ADR, 0x000A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S58)
- {
- Name (_SUN, 0x0B) // _SUN: Slot User Number
- Name (_ADR, 0x000B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S60)
- {
- Name (_SUN, 0x0C) // _SUN: Slot User Number
- Name (_ADR, 0x000C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S68)
- {
- Name (_SUN, 0x0D) // _SUN: Slot User Number
- Name (_ADR, 0x000D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S70)
- {
- Name (_SUN, 0x0E) // _SUN: Slot User Number
- Name (_ADR, 0x000E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S78)
- {
- Name (_SUN, 0x0F) // _SUN: Slot User Number
- Name (_ADR, 0x000F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S80)
- {
- Name (_SUN, 0x10) // _SUN: Slot User Number
- Name (_ADR, 0x00100000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S88)
- {
- Name (_SUN, 0x11) // _SUN: Slot User Number
- Name (_ADR, 0x00110000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S90)
- {
- Name (_SUN, 0x12) // _SUN: Slot User Number
- Name (_ADR, 0x00120000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (S98)
- {
- Name (_SUN, 0x13) // _SUN: Slot User Number
- Name (_ADR, 0x00130000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA0)
- {
- Name (_SUN, 0x14) // _SUN: Slot User Number
- Name (_ADR, 0x00140000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SA8)
- {
- Name (_SUN, 0x15) // _SUN: Slot User Number
- Name (_ADR, 0x00150000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB0)
- {
- Name (_SUN, 0x16) // _SUN: Slot User Number
- Name (_ADR, 0x00160000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SB8)
- {
- Name (_SUN, 0x17) // _SUN: Slot User Number
- Name (_ADR, 0x00170000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC0)
- {
- Name (_SUN, 0x18) // _SUN: Slot User Number
- Name (_ADR, 0x00180000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SC8)
- {
- Name (_SUN, 0x19) // _SUN: Slot User Number
- Name (_ADR, 0x00190000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD0)
- {
- Name (_SUN, 0x1A) // _SUN: Slot User Number
- Name (_ADR, 0x001A0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SD8)
- {
- Name (_SUN, 0x1B) // _SUN: Slot User Number
- Name (_ADR, 0x001B0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE0)
- {
- Name (_SUN, 0x1C) // _SUN: Slot User Number
- Name (_ADR, 0x001C0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SE8)
- {
- Name (_SUN, 0x1D) // _SUN: Slot User Number
- Name (_ADR, 0x001D0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF0)
- {
- Name (_SUN, 0x1E) // _SUN: Slot User Number
- Name (_ADR, 0x001E0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Device (SF8)
- {
- Name (_SUN, 0x1F) // _SUN: Slot User Number
- Name (_ADR, 0x001F0000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
- }
-
- Method (DVNT, 2, NotSerialized)
- {
- If ((Arg0 & 0x10))
- {
- Notify (S20, Arg1)
- }
-
- If ((Arg0 & 0x20))
- {
- Notify (S28, Arg1)
- }
-
- If ((Arg0 & 0x40))
- {
- Notify (S30, Arg1)
- }
-
- If ((Arg0 & 0x80))
- {
- Notify (S38, Arg1)
- }
-
- If ((Arg0 & 0x0100))
- {
- Notify (S40, Arg1)
- }
-
- If ((Arg0 & 0x0200))
- {
- Notify (S48, Arg1)
- }
-
- If ((Arg0 & 0x0400))
- {
- Notify (S50, Arg1)
- }
-
- If ((Arg0 & 0x0800))
- {
- Notify (S58, Arg1)
- }
-
- If ((Arg0 & 0x1000))
- {
- Notify (S60, Arg1)
- }
-
- If ((Arg0 & 0x2000))
- {
- Notify (S68, Arg1)
- }
-
- If ((Arg0 & 0x4000))
- {
- Notify (S70, Arg1)
- }
-
- If ((Arg0 & 0x8000))
- {
- Notify (S78, Arg1)
- }
-
- If ((Arg0 & 0x00010000))
- {
- Notify (S80, Arg1)
- }
-
- If ((Arg0 & 0x00020000))
- {
- Notify (S88, Arg1)
- }
-
- If ((Arg0 & 0x00040000))
- {
- Notify (S90, Arg1)
- }
-
- If ((Arg0 & 0x00080000))
- {
- Notify (S98, Arg1)
- }
-
- If ((Arg0 & 0x00100000))
- {
- Notify (SA0, Arg1)
- }
-
- If ((Arg0 & 0x00200000))
- {
- Notify (SA8, Arg1)
- }
-
- If ((Arg0 & 0x00400000))
- {
- Notify (SB0, Arg1)
- }
-
- If ((Arg0 & 0x00800000))
- {
- Notify (SB8, Arg1)
- }
-
- If ((Arg0 & 0x01000000))
- {
- Notify (SC0, Arg1)
- }
-
- If ((Arg0 & 0x02000000))
- {
- Notify (SC8, Arg1)
- }
-
- If ((Arg0 & 0x04000000))
- {
- Notify (SD0, Arg1)
- }
-
- If ((Arg0 & 0x08000000))
- {
- Notify (SD8, Arg1)
- }
-
- If ((Arg0 & 0x10000000))
- {
- Notify (SE0, Arg1)
- }
-
- If ((Arg0 & 0x20000000))
- {
- Notify (SE8, Arg1)
- }
-
- If ((Arg0 & 0x40000000))
- {
- Notify (SF0, Arg1)
- }
-
- If ((Arg0 & 0x80000000))
- {
- Notify (SF8, Arg1)
- }
- }
-
Method (PCNT, 0, NotSerialized)
{
- BNUM = Zero
- DVNT (PCIU, One)
- DVNT (PCID, 0x03)
^S18.PCNT ()
}
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-4-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
|
274763957b |
tests/acpi: add new unit test to test hotplug off/on feature on the root pci bus
Ability to turn hotplug off on the pci root bus for i440fx was added in commit:
|
||
|
|
eb9609a17d |
tests/acpi: mark addition of table DSDT.roothp for unit testing root pci hotplug
A new binary acpi table tests/data/acpi/pc/DSDT.roothp is added in order to
unit test the feature flag that can disable/enable root pci bus hotplug on
i440fx. This feature was added with the commit:
|
||
|
|
3d7e78aa77 |
Introduce a new flag for i440fx to disable PCI hotplug on the root bus
We introduce a new global flag 'acpi-root-pci-hotplug' for i440fx with which
we can turn on or off PCI device hotplug on the root bus. This flag can be
used to prevent all PCI devices from getting hotplugged or unplugged from the
root PCI bus.
This feature is targetted mostly towards Windows VMs. It is useful in cases
where some hypervisor admins want to deploy guest VMs in a way so that the
users of the guest OSes are not able to hot-eject certain PCI devices from
the Windows system tray. Laine has explained the use case here in detail:
https://www.redhat.com/archives/libvir-list/2020-February/msg00110.html
Julia has resolved this issue for PCIE buses with the following commit:
|