Started working on iPod Touch 2G
This commit is contained in:
Martijn de Vos committed
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1600b9f46b
commit
96da27fe3b
11 files changed
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@@ -44,3 +44,4 @@ CONFIG_ARM_VIRT=y
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# CONFIG_FSL_IMX7=n
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# CONFIG_FSL_IMX6UL=n
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# CONFIG_ALLWINNER_H3=n
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CONFIG_IPOD_TOUCH_2G=y
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@@ -679,3 +679,7 @@ config ARMSSE
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select UNIMP
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select SSE_COUNTER
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select SSE_TIMER
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config IPOD_TOUCH_2G
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bool
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select IPOD_TOUCH_2G
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@@ -0,0 +1,162 @@
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/arm/boot.h"
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#include "exec/address-spaces.h"
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#include "hw/misc/unimp.h"
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#include "hw/irq.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/reset.h"
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#include "hw/platform-bus.h"
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#include "hw/block/flash.h"
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#include "hw/qdev-clock.h"
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#include "hw/arm/ipod_touch_2g.h"
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#include "target/arm/cpregs.h"
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#define VMSTATE_IT2G_CPREG(name) \
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VMSTATE_UINT64(IT2G_CPREG_VAR_NAME(name), IPodTouchMachineState)
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#define IT2G_CPREG_DEF(p_name, p_op0, p_op1, p_crn, p_crm, p_op2, p_access, p_reset) \
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{ \
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.cp = 15, \
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.name = #p_name, .opc0 = p_op0, .crn = p_crn, .crm = p_crm, \
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.opc1 = p_op1, .opc2 = p_op2, .access = p_access, .resetvalue = p_reset, \
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.state = ARM_CP_STATE_AA32, .type = ARM_CP_OVERRIDE, \
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.fieldoffset = offsetof(IPodTouchMachineState, IT2G_CPREG_VAR_NAME(p_name)) \
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- offsetof(ARMCPU, env) \
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}
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static void allocate_ram(MemoryRegion *top, const char *name, uint32_t addr, uint32_t size)
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{
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MemoryRegion *sec = g_new(MemoryRegion, 1);
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memory_region_init_ram(sec, NULL, name, size, &error_fatal);
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memory_region_add_subregion(top, addr, sec);
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}
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static const ARMCPRegInfo it2g_cp_reginfo_tcg[] = {
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IT2G_CPREG_DEF(REG0, 0, 0, 7, 6, 0, PL1_RW, 0),
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IT2G_CPREG_DEF(REG1, 0, 0, 15, 2, 4, PL1_RW, 0),
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};
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static void ipod_touch_cpu_setup(MachineState *machine, MemoryRegion **sysmem, ARMCPU **cpu, AddressSpace **nsas)
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{
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Object *cpuobj = object_new(machine->cpu_type);
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*cpu = ARM_CPU(cpuobj);
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CPUState *cs = CPU(*cpu);
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*sysmem = get_system_memory();
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object_property_set_link(cpuobj, "memory", OBJECT(*sysmem), &error_abort);
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object_property_set_bool(cpuobj, "has_el3", false, NULL);
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object_property_set_bool(cpuobj, "has_el2", false, NULL);
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object_property_set_bool(cpuobj, "realized", true, &error_fatal);
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*nsas = cpu_get_address_space(cs, ARMASIdx_NS);
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define_arm_cp_regs(*cpu, it2g_cp_reginfo_tcg);
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object_unref(cpuobj);
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}
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static void ipod_touch_cpu_reset(void *opaque)
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{
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IPodTouchMachineState *nms = IPOD_TOUCH_MACHINE((MachineState *)opaque);
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ARMCPU *cpu = nms->cpu;
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CPUState *cs = CPU(cpu);
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cpu_reset(cs);
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//env->regs[0] = nms->kbootargs_pa;
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//cpu_set_pc(CPU(cpu), 0xc00607ec);
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cpu_set_pc(CPU(cpu), VROM_MEM_BASE);
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//env->regs[0] = 0x9000000;
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//cpu_set_pc(CPU(cpu), LLB_BASE + 0x100);
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//cpu_set_pc(CPU(cpu), VROM_MEM_BASE);
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}
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static void ipod_touch_memory_setup(MachineState *machine, MemoryRegion *sysmem, AddressSpace *nsas)
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{
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IPodTouchMachineState *nms = IPOD_TOUCH_MACHINE(machine);
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allocate_ram(sysmem, "sram1", SRAM1_MEM_BASE, 0x100000);
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// load the bootrom (vrom)
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uint8_t *file_data = NULL;
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unsigned long fsize;
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if (g_file_get_contents("/Users/martijndevos/Documents/ipod_touch_2g_emulation/bootrom_240_4", (char **)&file_data, &fsize, NULL)) {
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allocate_ram(sysmem, "vrom", 0x0, 0x20000);
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address_space_rw(nsas, VROM_MEM_BASE, MEMTXATTRS_UNSPECIFIED, (uint8_t *)file_data, fsize, 1);
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}
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}
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static void ipod_touch_instance_init(Object *obj)
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{
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}
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static void ipod_touch_machine_init(MachineState *machine)
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{
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IPodTouchMachineState *nms = IPOD_TOUCH_MACHINE(machine);
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MemoryRegion *sysmem;
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AddressSpace *nsas;
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ARMCPU *cpu;
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ipod_touch_cpu_setup(machine, &sysmem, &cpu, &nsas);
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nms->cpu = cpu;
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// init clock 0
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DeviceState *dev = qdev_new("ipodtouch.clock");
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IPodTouchClockState *clock0_state = IPOD_TOUCH_CLOCK(dev);
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nms->clock0 = clock0_state;
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memory_region_add_subregion(sysmem, CLOCK0_MEM_BASE, &clock0_state->iomem);
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// init clock 1
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dev = qdev_new("ipodtouch.clock");
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IPodTouchClockState *clock1_state = IPOD_TOUCH_CLOCK(dev);
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nms->clock1 = clock1_state;
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memory_region_add_subregion(sysmem, CLOCK1_MEM_BASE, &clock1_state->iomem);
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// init GPIO
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dev = qdev_new("ipodtouch.gpio");
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IPodTouchGPIOState *gpio_state = IPOD_TOUCH_GPIO(dev);
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nms->gpio_state = gpio_state;
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memory_region_add_subregion(sysmem, GPIO_MEM_BASE, &gpio_state->iomem);
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// init the chip ID module
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dev = qdev_new("ipodtouch.chipid");
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IPodTouchChipIDState *chipid_state = IPOD_TOUCH_CHIPID(dev);
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nms->chipid_state = chipid_state;
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memory_region_add_subregion(sysmem, CHIPID_MEM_BASE, &chipid_state->iomem);
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ipod_touch_memory_setup(machine, sysmem, nsas);
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qemu_register_reset(ipod_touch_cpu_reset, nms);
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}
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static void ipod_touch_machine_class_init(ObjectClass *klass, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(klass);
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mc->desc = "iPod Touch";
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mc->init = ipod_touch_machine_init;
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mc->max_cpus = 1;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm1176");
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}
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static const TypeInfo ipod_touch_machine_info = {
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.name = TYPE_IPOD_TOUCH_MACHINE,
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.parent = TYPE_MACHINE,
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.instance_size = sizeof(IPodTouchMachineState),
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.class_size = sizeof(IPodTouchMachineClass),
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.class_init = ipod_touch_machine_class_init,
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.instance_init = ipod_touch_instance_init,
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};
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static void ipod_touch_machine_types(void)
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{
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type_register_static(&ipod_touch_machine_info);
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}
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type_init(ipod_touch_machine_types)
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@@ -0,0 +1,51 @@
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#include "hw/arm/ipod_touch_chipid.h"
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static uint64_t ipod_touch_chipid_read(void *opaque, hwaddr addr, unsigned size)
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{
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//fprintf(stderr, "%s: offset = 0x%08x\n", __func__, addr);
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switch (addr) {
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case CHIPID_UNKNOWN1:
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return 0;
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case CHIPID_INFO:
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return (0x8720 << 16) | 0x1;
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default:
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hw_error("%s: reading from unknown chip ID register 0x%08x\n", __func__, addr);
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}
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return 0;
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}
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static const MemoryRegionOps ipod_touch_chipid_ops = {
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.read = ipod_touch_chipid_read,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void ipod_touch_chipid_init(Object *obj)
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{
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IPodTouchChipIDState *s = IPOD_TOUCH_CHIPID(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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memory_region_init_io(&s->iomem, obj, &ipod_touch_chipid_ops, s, TYPE_IPOD_TOUCH_CHIPID, 0x10);
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sysbus_init_mmio(sbd, &s->iomem);
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}
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static void ipod_touch_chipid_class_init(ObjectClass *klass, void *data)
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{
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}
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static const TypeInfo ipod_touch_chipid_type_info = {
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.name = TYPE_IPOD_TOUCH_CHIPID,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(IPodTouchChipIDState),
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.instance_init = ipod_touch_chipid_init,
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.class_init = ipod_touch_chipid_class_init,
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};
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static void ipod_touch_chipid_register_types(void)
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{
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type_register_static(&ipod_touch_chipid_type_info);
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}
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type_init(ipod_touch_chipid_register_types)
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@@ -0,0 +1,139 @@
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#include "hw/arm/ipod_touch_clock.h"
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static void s5l8900_clock_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
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{
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IPodTouchClockState *s = (struct IPodTouchClockState *) opaque;
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switch (addr) {
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case CLOCK_CONFIG0:
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s->config0 = val;
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break;
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case CLOCK_CONFIG1:
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s->config1 = val;
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break;
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case CLOCK_CONFIG2:
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s->config2 = val;
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break;
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case CLOCK_CONFIG3:
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s->config3 = val;
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break;
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case CLOCK_CONFIG4:
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s->config4 = val;
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break;
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case CLOCK_CONFIG5:
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s->config5 = val;
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break;
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case CLOCK_PLL0CON:
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s->pll0con = val;
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break;
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case CLOCK_PLL1CON:
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s->pll1con = val;
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break;
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case CLOCK_PLL2CON:
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s->pll2con = val;
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break;
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case CLOCK_PLL3CON:
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s->pll3con = val;
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break;
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case CLOCK_PLL0LCNT:
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s->pll0lcnt = val;
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break;
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case CLOCK_PLL1LCNT:
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s->pll1lcnt = val;
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break;
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case CLOCK_PLL2LCNT:
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s->pll2lcnt = val;
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break;
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case CLOCK_PLL3LCNT:
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s->pll3lcnt = val;
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break;
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case CLOCK_PLLLOCK:
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hw_error("%s: Forbidden write to PLLLOCK register 0x%08x\n", __func__, addr);
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break;
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case CLOCK_PLLMODE:
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s->pllmode = val;
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break;
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case CLOCK_PWRCON0:
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s->pwrcon0 = val;
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break;
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case CLOCK_PWRCON1:
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s->pwrcon1 = val;
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break;
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case CLOCK_PWRCON2:
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s->pwrcon2 = val;
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break;
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case CLOCK_PWRCON3:
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s->pwrcon3 = val;
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break;
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case CLOCK_PWRCON4:
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s->pwrcon4 = val;
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break;
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default:
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hw_error("%s: writing value 0x%08x to unknown clock register 0x%08x\n", __func__, val, addr);
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}
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}
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static uint64_t s5l8900_clock_read(void *opaque, hwaddr addr, unsigned size)
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{
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IPodTouchClockState *s = (struct IPodTouchClockState *) opaque;
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switch (addr) {
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case CLOCK_CONFIG0:
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return s->config0;
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case CLOCK_CONFIG1:
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return s->config1;
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case CLOCK_CONFIG2:
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return s->config2;
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case CLOCK_PLL0CON:
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return s->pll0con;
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case CLOCK_PLL1CON:
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return s->pll1con;
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case CLOCK_PLL2CON:
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return s->pll2con;
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case CLOCK_PLL3CON:
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return s->pll3con;
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case CLOCK_PLLLOCK:
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return (1 | 2 | 4 | 8); // all PLLs are locked
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case CLOCK_PLLMODE:
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return s->pllmode;
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default:
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hw_error("%s: reading from unknown clock register 0x%08x\n", __func__, addr);
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}
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return 0;
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}
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static const MemoryRegionOps clock_ops = {
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.read = s5l8900_clock_read,
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.write = s5l8900_clock_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void s5l8900_clock_init(Object *obj)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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DeviceState *dev = DEVICE(sbd);
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IPodTouchClockState *s = IPOD_TOUCH_CLOCK(dev);
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memory_region_init_io(&s->iomem, obj, &clock_ops, s, "clock", 0x80);
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}
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static void s5l8900_clock_class_init(ObjectClass *klass, void *data)
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{
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}
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static const TypeInfo ipod_touch_clock_info = {
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.name = TYPE_IPOD_TOUCH_CLOCK,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(IPodTouchClockState),
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.instance_init = s5l8900_clock_init,
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.class_init = s5l8900_clock_class_init,
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};
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static void ipod_touch_machine_types(void)
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{
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type_register_static(&ipod_touch_clock_info);
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}
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type_init(ipod_touch_machine_types)
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@@ -0,0 +1,62 @@
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#include "hw/arm/ipod_touch_gpio.h"
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static void s5l8900_gpio_write(void *opaque, hwaddr addr, uint64_t value, unsigned size)
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{
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//fprintf(stderr, "%s: writing 0x%08x to 0x%08x\n", __func__, value, addr);
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IPodTouchGPIOState *s = (struct IPodTouchGPIOState *) opaque;
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switch(addr) {
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default:
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break;
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}
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}
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static uint64_t s5l8900_gpio_read(void *opaque, hwaddr addr, unsigned size)
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{
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//fprintf(stderr, "%s: read from location 0x%08x\n", __func__, addr);
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IPodTouchGPIOState *s = (struct IPodTouchGPIOState *) opaque;
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switch(addr) {
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case 0x2c4:
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return s->gpio_state;
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default:
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break;
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}
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return 0;
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}
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static const MemoryRegionOps gpio_ops = {
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.read = s5l8900_gpio_read,
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.write = s5l8900_gpio_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void s5l8900_gpio_init(Object *obj)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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DeviceState *dev = DEVICE(sbd);
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IPodTouchGPIOState *s = IPOD_TOUCH_GPIO(dev);
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memory_region_init_io(&s->iomem, obj, &gpio_ops, s, "gpio", 0x10000);
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}
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static void s5l8900_gpio_class_init(ObjectClass *klass, void *data)
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{
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}
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static const TypeInfo ipod_touch_gpio_info = {
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.name = TYPE_IPOD_TOUCH_GPIO,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(IPodTouchGPIOState),
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.instance_init = s5l8900_gpio_init,
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.class_init = s5l8900_gpio_class_init,
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};
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static void ipod_touch_machine_types(void)
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{
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type_register_static(&ipod_touch_gpio_info);
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}
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type_init(ipod_touch_machine_types)
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@@ -65,6 +65,7 @@ arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
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arm_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))
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arm_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
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arm_ss.add(when: 'CONFIG_XEN', if_true: files('xen_arm.c'))
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arm_ss.add(when: 'CONFIG_IPOD_TOUCH_2G', if_true: files('ipod_touch_2g.c', 'ipod_touch_clock.c', 'ipod_touch_chipid.c', 'ipod_touch_gpio.c'))
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system_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
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system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c'))
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@@ -0,0 +1,44 @@
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#ifndef HW_ARM_IPOD_TOUCH_H
|
||||
#define HW_ARM_IPOD_TOUCH_H
|
||||
|
||||
#include "exec/hwaddr.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/arm/boot.h"
|
||||
#include "cpu.h"
|
||||
#include "hw/arm/ipod_touch_clock.h"
|
||||
#include "hw/arm/ipod_touch_chipid.h"
|
||||
#include "hw/arm/ipod_touch_gpio.h"
|
||||
|
||||
#define TYPE_IPOD_TOUCH "iPod-Touch"
|
||||
|
||||
#define IT2G_CPREG_VAR_NAME(name) cpreg_##name
|
||||
#define IT2G_CPREG_VAR_DEF(name) uint64_t IT2G_CPREG_VAR_NAME(name)
|
||||
|
||||
#define TYPE_IPOD_TOUCH_MACHINE MACHINE_TYPE_NAME(TYPE_IPOD_TOUCH)
|
||||
#define IPOD_TOUCH_MACHINE(obj) \
|
||||
OBJECT_CHECK(IPodTouchMachineState, (obj), TYPE_IPOD_TOUCH_MACHINE)
|
||||
|
||||
// memory addresses
|
||||
#define VROM_MEM_BASE 0x0
|
||||
#define SRAM1_MEM_BASE 0x22020000
|
||||
#define CLOCK0_MEM_BASE 0x3C500000
|
||||
#define GPIO_MEM_BASE 0x3CF00000
|
||||
#define CHIPID_MEM_BASE 0x3D100000
|
||||
#define CLOCK1_MEM_BASE 0x3E000000
|
||||
|
||||
typedef struct {
|
||||
MachineClass parent;
|
||||
} IPodTouchMachineClass;
|
||||
|
||||
typedef struct {
|
||||
MachineState parent;
|
||||
ARMCPU *cpu;
|
||||
IPodTouchClockState *clock0;
|
||||
IPodTouchClockState *clock1;
|
||||
IPodTouchChipIDState *chipid_state;
|
||||
IPodTouchGPIOState *gpio_state;
|
||||
IT2G_CPREG_VAR_DEF(REG0);
|
||||
IT2G_CPREG_VAR_DEF(REG1);
|
||||
} IPodTouchMachineState;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,19 @@
|
||||
#ifndef HW_ARM_IPOD_TOUCH_CHIPID_H
|
||||
#define HW_ARM_IPOD_TOUCH_CHIPID_H
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "hw/hw.h"
|
||||
#include "hw/sysbus.h"
|
||||
|
||||
#define TYPE_IPOD_TOUCH_CHIPID "ipodtouch.chipid"
|
||||
OBJECT_DECLARE_SIMPLE_TYPE(IPodTouchChipIDState, IPOD_TOUCH_CHIPID)
|
||||
|
||||
#define CHIPID_UNKNOWN1 0x4
|
||||
#define CHIPID_INFO 0x8
|
||||
|
||||
typedef struct IPodTouchChipIDState {
|
||||
SysBusDevice busdev;
|
||||
MemoryRegion iomem;
|
||||
} IPodTouchChipIDState;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,68 @@
|
||||
#ifndef IPOD_TOUCH_CLOCK_H
|
||||
#define IPOD_TOUCH_CLOCK_H
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu/module.h"
|
||||
#include "qemu/timer.h"
|
||||
#include "hw/hw.h"
|
||||
#include "hw/sysbus.h"
|
||||
#include "hw/irq.h"
|
||||
#include "hw/clock.h"
|
||||
|
||||
#define TYPE_IPOD_TOUCH_CLOCK "ipodtouch.clock"
|
||||
OBJECT_DECLARE_SIMPLE_TYPE(IPodTouchClockState, IPOD_TOUCH_CLOCK)
|
||||
|
||||
#define CLOCK_CONFIG0 0x0
|
||||
#define CLOCK_CONFIG1 0x4
|
||||
#define CLOCK_CONFIG2 0x8
|
||||
#define CLOCK_CONFIG3 0xC
|
||||
#define CLOCK_CONFIG4 0x10
|
||||
#define CLOCK_CONFIG5 0x14
|
||||
|
||||
#define CLOCK_PLL0CON 0x20
|
||||
#define CLOCK_PLL1CON 0x24
|
||||
#define CLOCK_PLL2CON 0x28
|
||||
#define CLOCK_PLL3CON 0x2C
|
||||
#define CLOCK_PLL0LCNT 0x30
|
||||
#define CLOCK_PLL1LCNT 0x34
|
||||
#define CLOCK_PLL2LCNT 0x38
|
||||
#define CLOCK_PLL3LCNT 0x3C
|
||||
#define CLOCK_PLLLOCK 0x40
|
||||
#define CLOCK_PLLMODE 0x44
|
||||
|
||||
#define CLOCK_PWRCON0 0x48
|
||||
#define CLOCK_PWRCON1 0x4C
|
||||
#define CLOCK_PWRCON2 0x58
|
||||
#define CLOCK_PWRCON3 0x68
|
||||
#define CLOCK_PWRCON4 0x6C
|
||||
|
||||
typedef struct IPodTouchClockState
|
||||
{
|
||||
SysBusDevice busdev;
|
||||
MemoryRegion iomem;
|
||||
uint32_t config0;
|
||||
uint32_t config1;
|
||||
uint32_t config2;
|
||||
uint32_t config3;
|
||||
uint32_t config4;
|
||||
uint32_t config5;
|
||||
|
||||
uint32_t pll0con;
|
||||
uint32_t pll1con;
|
||||
uint32_t pll2con;
|
||||
uint32_t pll3con;
|
||||
uint32_t pll0lcnt;
|
||||
uint32_t pll1lcnt;
|
||||
uint32_t pll2lcnt;
|
||||
uint32_t pll3lcnt;
|
||||
uint32_t pllmode;
|
||||
|
||||
uint32_t pwrcon0;
|
||||
uint32_t pwrcon1;
|
||||
uint32_t pwrcon2;
|
||||
uint32_t pwrcon3;
|
||||
uint32_t pwrcon4;
|
||||
|
||||
} IPodTouchClockState;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,28 @@
|
||||
#ifndef IPOD_TOUCH_GPIO_H
|
||||
#define IPOD_TOUCH_GPIO_H
|
||||
|
||||
#include <math.h>
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu/module.h"
|
||||
#include "qemu/timer.h"
|
||||
#include "hw/sysbus.h"
|
||||
|
||||
#define TYPE_IPOD_TOUCH_GPIO "ipodtouch.gpio"
|
||||
OBJECT_DECLARE_SIMPLE_TYPE(IPodTouchGPIOState, IPOD_TOUCH_GPIO)
|
||||
|
||||
#define GPIO_BUTTON_POWER 0x1605
|
||||
#define GPIO_BUTTON_HOME 0x1606
|
||||
|
||||
#define GPIO_BUTTON_POWER_IRQ 0x2D
|
||||
#define GPIO_BUTTON_HOME_IRQ 0x2E
|
||||
|
||||
#define NUM_GPIO_PINS 0x20
|
||||
|
||||
typedef struct IPodTouchGPIOState
|
||||
{
|
||||
SysBusDevice parent_obj;
|
||||
MemoryRegion iomem;
|
||||
uint32_t gpio_state;
|
||||
} IPodTouchGPIOState;
|
||||
|
||||
#endif
|
||||
Reference in new issue
Block a user