Richard Henderson 5f5a05cdd9 target/cris: Do not exit tb for X_FLAG changes ...

We always know the exact value of X, that's all that matters.
This avoids splitting the TB e.g. between "ax" and "addq".

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

2021-06-29 10:04:56 -07:00

..

alpha

target/alpha: Honor the FEN bit

2021-06-28 07:27:55 -07:00

arm

target/arm: Implement MTE3

2021-06-24 14:58:48 +01:00

avr

target/avr: Convert to TranslatorOps

2021-06-29 10:04:56 -07:00

cris

target/cris: Do not exit tb for X_FLAG changes

2021-06-29 10:04:56 -07:00

hexagon

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

hppa

tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode

2021-06-19 08:51:11 -07:00

i386

target/i386: kvm: add support for TSC scaling

2021-06-25 10:53:46 +02:00

m68k

tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode

2021-06-19 08:51:11 -07:00

microblaze

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

mips

target/mips: Merge msa32/msa64 decodetree definitions

2021-06-24 16:48:08 +02:00

nios2

target/nios2: Use pc_next for pc + 4

2021-06-29 10:03:11 -07:00

openrisc

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

ppc

tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode

2021-06-19 08:51:11 -07:00

riscv

target/riscv: gdbstub: Fix dynamic CSR XML generation

2021-06-24 05:00:12 -07:00

rx

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

s390x

target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub

2021-06-21 08:48:21 +02:00

sh4

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

sparc

docs: fix references to docs/devel/tracing.rst

2021-06-02 06:51:09 +02:00

tricore

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

xtensa

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

meson.build

Drop the deprecated unicore32 target

2021-05-12 18:20:52 +02:00