Peter Maydell 1509a13240 target/arm: Correct definition of PMCRDP ...

The PMCR_EL0.DP bit is bit 5, which is 0x20, not 0x10.  0x10 is 'X'.
Correct our #define of PMCRDP and add the missing PMCRX.

We do have the correct behaviour for handling the DP bit being
set, so this fixes a guest-visible bug.

Fixes: 033614c47d
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200214175116.9164-17-peter.maydell@linaro.org
(cherry picked from commit a1ed04dd79)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

2020-06-22 12:50:35 -05:00

..

alpha

target/alpha: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

arm

target/arm: Correct definition of PMCRDP

2020-06-22 12:50:35 -05:00

cris

cputlb: ensure _cmmu helper functions follow the naming standard

2019-10-28 15:12:38 +00:00

hppa

target/hppa: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

i386

target/i386: kvm: initialize feature MSRs very early

2020-06-22 12:48:19 -05:00

lm32

Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2019-08-21' into staging

2019-08-22 10:31:21 +01:00

m68k

m68k: Fix regression causing Single-Step via GDB/RSP to not single step

2020-06-22 12:47:48 -05:00

microblaze

target/microblaze: Plug temp leak around eval_cond_jmp()

2019-11-12 16:35:26 +01:00

mips

target/mips: Refactor handling of vector compare 'less than' (signed) instructions

2019-10-25 18:37:01 +02:00

moxie

hw/core: Move cpu.c, cpu.h from qom/ to hw/core/

2019-08-21 13:24:01 +02:00

nios2

Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2019-08-21' into staging

2019-08-22 10:31:21 +01:00

openrisc

target/openrisc: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

ppc

target/ppc: Fix mtmsr(d) L=1 variant that loses interrupts

2020-06-09 21:10:26 -05:00

riscv

target/riscv: update mstatus.SD when FS is set dirty

2020-06-22 12:09:02 -05:00

s390x

s390/sclp: improve special wait psw logic

2020-06-02 10:40:21 -05:00

sh4

target/sh4: fetch code with translator_ld

2019-10-28 15:12:38 +00:00

sparc

target/sparc: Define an enumeration for accessing env->regwptr

2019-11-06 13:35:25 +01:00

tilegx

tcg: TCGMemOp is now accelerator independent MemOp

2019-09-03 08:30:38 -07:00

tricore

tcg: TCGMemOp is now accelerator independent MemOp

2019-09-03 08:30:38 -07:00

unicore32

Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2019-08-21' into staging

2019-08-22 10:31:21 +01:00

xtensa

target/xtensa: fetch code with translator_ld

2019-10-28 15:12:38 +00:00