67 lines
1.6 KiB
C
67 lines
1.6 KiB
C
#ifndef HW_ARM_IPOD_TOUCH_NAND_H
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#define HW_ARM_IPOD_TOUCH_NAND_H
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "hw/platform-bus.h"
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#include "hw/hw.h"
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#include "hw/irq.h"
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#include "qemu/lockable.h"
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#define NAND_NUM_BANKS 8
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#define NAND_BYTES_PER_PAGE 2048
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#define NAND_BYTES_PER_SPARE 64
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#define NAND_CHIP_ID 0xA514D3AD
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#define NAND_FMCTRL0 0x0
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#define NAND_FMCTRL1 0x4
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#define NAND_CMD 0x8
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#define NAND_FMADDR0 0xC
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#define NAND_FMADDR1 0x10
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#define NAND_FMANUM 0x2C
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#define NAND_FMDNUM 0x30
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#define NAND_FMCSTAT 0x48
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#define NAND_FMFIFO 0x80
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#define NAND_RSCTRL 0x100
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#define NAND_CMD_ID 0x90
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#define NAND_CMD_READ 0x30
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#define NAND_CMD_READSTATUS 0x70
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#define FILESYSTEM_START_VPN 206851
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#define FILESYSTEM_NUM_PAGES 132854
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#define TYPE_ITNAND "itnand"
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OBJECT_DECLARE_SIMPLE_TYPE(ITNandState, ITNAND)
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typedef struct ITNandState {
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SysBusDevice busdev;
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MemoryRegion iomem;
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uint32_t fmctrl0;
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uint32_t fmctrl1;
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uint32_t fmaddr0;
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uint32_t fmaddr1;
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uint32_t fmanum;
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uint32_t fmdnum;
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uint32_t rsctrl;
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uint32_t cmd;
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uint8_t reading_spare;
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qemu_irq irq;
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uint8_t *page_buffer;
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uint8_t *page_spare_buffer;
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uint32_t buffered_bank;
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uint32_t buffered_page;
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bool reading_multiple_pages;
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uint32_t cur_bank_reading;
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uint32_t banks_to_read[512]; // used when in multiple page read mode
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uint32_t pages_to_read[512]; // used when in multiple page read mode
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bool is_writing;
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QemuMutex lock;
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char *nand_path;
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} ITNandState;
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void nand_set_buffered_page(ITNandState *s, uint32_t page);
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#endif |