Andrey Smirnov
757282ada8
i.MX: Add i.MX7 SOC implementation.
The following interfaces are partially or fully emulated:
* up to 2 Cortex A9 cores (SMP works with PSCI)
* A7 MPCORE (identical to A15 MPCORE)
* 4 GPTs modules
* 7 GPIO controllers
* 2 IOMUXC controllers
* 1 CCM module
* 1 SVNS module
* 1 SRC module
* 1 GPCv2 controller
* 4 eCSPI controllers
* 4 I2C controllers
* 7 i.MX UART controllers
* 2 FlexCAN controllers
* 2 Ethernet controllers (FEC)
* 3 SD controllers (USDHC)
* 4 WDT modules
* 1 SDMA module
* 1 GPR module
* 2 USBMISC modules
* 2 ADC modules
* 1 PCIe controller
Tested to boot and work with upstream Linux (4.13+) guest.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
[PMM: folded a couple of long lines]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 17:09:43 +00:00
..
2018-03-06 11:20:44 +00:00
2018-03-02 13:45:50 -06:00
2018-03-02 13:45:50 -06:00
2018-03-07 08:30:28 +13:00
2018-03-06 14:01:28 +01:00
2018-03-04 17:27:35 +01:00
2018-03-09 17:09:43 +00:00
2018-03-06 10:19:07 +00:00
2016-07-12 16:20:46 +02:00
2018-03-02 13:45:50 -06:00
2018-03-02 13:45:50 -06:00
2018-03-05 14:27:24 +00:00
2018-03-02 13:45:57 -06:00
2018-03-06 14:01:27 +01:00
2018-03-06 14:01:26 +01:00
2018-02-09 13:52:15 +01:00
2018-02-26 13:41:34 +01:00
2018-03-07 08:30:28 +13:00
2018-03-05 15:16:30 +00:00
2018-03-07 08:30:28 +13:00
2017-10-10 16:33:55 +02:00
2018-02-09 13:52:16 +01:00
2017-02-28 20:47:50 +01:00
2016-10-12 09:54:52 +02:00