target/mips: Move TCG source files under tcg/ sub directory

To ease maintenance, move all TCG specific files under the tcg/
sub-directory. Adapt the Meson machinery.

The following prototypes:
- mips_tcg_init()
- mips_cpu_do_unaligned_access()
- mips_cpu_do_transaction_failed()
can now be restricted to the "tcg-internal.h" header.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-29-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé committed 2021-05-02 16:49:35 +02:00
1 parent 5679479b9a
commit a2b0a27d33
25 files changed
+41 -43

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+1 -1
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@@ -608,4 +608,4 @@ DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env)
#include "tcg/sysemu_helper.h.inc"
#endif /* !CONFIG_USER_ONLY */
#include "msa_helper.h.inc"
#include "tcg/msa_helper.h.inc"
-11
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@@ -82,9 +82,6 @@ extern const int mips_defs_number;
int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
#define USEG_LIMIT ((target_ulong)(int32_t)0x7FFFFFFFUL)
#define KSEG0_BASE ((target_ulong)(int32_t)0x80000000UL)
@@ -151,12 +148,6 @@ struct CPUMIPSTLBContext {
} mmu;
};
void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
vaddr addr, unsigned size,
MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);
@@ -209,8 +200,6 @@ static inline bool cpu_mips_hw_interrupts_pending(CPUMIPSState *env)
return r;
}
void mips_tcg_init(void);
void msa_reset(CPUMIPSState *env);
/* cp0_timer.c */
-31
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@@ -1,11 +1,3 @@
gen = [
decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'),
decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'),
decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'),
decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'),
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
]
mips_user_ss = ss.source_set()
mips_softmmu_ss = ss.source_set()
mips_ss = ss.source_set()
@@ -20,35 +12,12 @@ if have_system
subdir('sysemu')
endif
mips_tcg_ss = ss.source_set()
mips_tcg_ss.add(gen)
mips_tcg_ss.add(files(
'dsp_helper.c',
'exception.c',
'fpu_helper.c',
'ldst_helper.c',
'lmmi_helper.c',
'msa_helper.c',
'msa_translate.c',
'op_helper.c',
'rel6_translate.c',
'translate.c',
'translate_addr_const.c',
'txx9_translate.c',
))
mips_tcg_ss.add(when: 'TARGET_MIPS64', if_true: files(
'tx79_translate.c',
), if_false: files(
'mxu_translate.c',
))
if 'CONFIG_TCG' in config_all
subdir('tcg')
endif
mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
target_arch += {'mips': mips_ss}
target_softmmu_arch += {'mips': mips_softmmu_ss}
target_user_arch += {'mips': mips_user_ss}
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+29
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@@ -1,3 +1,32 @@
gen = [
decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'),
decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'),
decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'),
decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'),
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
]
mips_ss.add(gen)
mips_ss.add(files(
'dsp_helper.c',
'exception.c',
'fpu_helper.c',
'ldst_helper.c',
'lmmi_helper.c',
'msa_helper.c',
'msa_translate.c',
'op_helper.c',
'rel6_translate.c',
'translate.c',
'translate_addr_const.c',
'txx9_translate.c',
))
mips_ss.add(when: 'TARGET_MIPS64', if_true: files(
'tx79_translate.c',
), if_false: files(
'mxu_translate.c',
))
if have_user
subdir('user')
endif
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+11
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@@ -11,15 +11,21 @@
#define MIPS_TCG_INTERNAL_H
#include "tcg/tcg.h"
#include "exec/memattrs.h"
#include "hw/core/cpu.h"
#include "cpu.h"
void mips_tcg_init(void);
void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
void mips_cpu_do_interrupt(CPUState *cpu);
bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
const char *mips_exception_name(int32_t exception);
@@ -46,6 +52,11 @@ bool mips_io_recompile_replay_branch(CPUState *cs, const TranslationBlock *tb);
hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
MMUAccessType access_type, uintptr_t retaddr);
void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
vaddr addr, unsigned size,
MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
void cpu_mips_tlb_flush(CPUMIPSState *env);
#endif /* !CONFIG_USER_ONLY */
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