diff --git a/.gitignore b/.gitignore
index 61fa39967b..525698a1e8 100644
--- a/.gitignore
+++ b/.gitignore
@@ -20,3 +20,5 @@ GTAGS
 *.swp
 *.patch
 *.gcov
+
+*.DS_Store
diff --git a/hw/arm/ipod_touch_2g.c b/hw/arm/ipod_touch_2g.c
index 0d86e9089e..c0d4724681 100644
--- a/hw/arm/ipod_touch_2g.c
+++ b/hw/arm/ipod_touch_2g.c
@@ -12,6 +12,7 @@
 #include "hw/arm/exynos4210.h"
 #include "hw/arm/ipod_touch_2g.h"
 #include "target/arm/cpregs.h"
+#include "qemu/error-report.h"
 
 #define VMSTATE_IT2G_CPREG(name) \
         VMSTATE_UINT64(IT2G_CPREG_VAR_NAME(name), IPodTouchMachineState)
diff --git a/hw/arm/ipod_touch_usb_otg.c b/hw/arm/ipod_touch_usb_otg.c
index 9e95b6a5cb..d2ca30e33b 100644
--- a/hw/arm/ipod_touch_usb_otg.c
+++ b/hw/arm/ipod_touch_usb_otg.c
@@ -133,7 +133,7 @@ static uint32_t synopsys_usb_in_ep_read(synopsys_usb_state *_state, uint8_t _ep,
         return _state->in_eps[_ep].dma_buffer;
 
     default:
-        hw_error("usb_synopsys: bad ep read offset 0x" TARGET_FMT_plx "\n", _addr);
+        hw_error("usb_synopsys: bad ep read offset 0x" HWADDR_FMT_plx "\n", _addr);
 		break;
     }
 
@@ -166,7 +166,7 @@ static uint32_t synopsys_usb_out_ep_read(synopsys_usb_state *_state, int _ep, hw
         return _state->out_eps[_ep].dma_buffer;
 
     default:
-        hw_error("usb_synopsys: bad ep read offset 0x" TARGET_FMT_plx "\n", _addr);
+        hw_error("usb_synopsys: bad ep read offset 0x" HWADDR_FMT_plx "\n", _addr);
 		break;
     }
 
@@ -308,7 +308,7 @@ static void synopsys_usb_in_ep_write(synopsys_usb_state *_state, int _ep, hwaddr
 		return;
 
     default:
-        hw_error("usb_synopsys: bad ep write offset 0x" TARGET_FMT_plx "\n", _addr);
+        hw_error("usb_synopsys: bad ep write offset 0x" HWADDR_FMT_plx "\n", _addr);
 		break;
     }
 }
@@ -346,7 +346,7 @@ static void synopsys_usb_out_ep_write(synopsys_usb_state *_state, int _ep, hwadd
 		return;
 
     default:
-        hw_error("usb_synopsys: bad ep write offset 0x" TARGET_FMT_plx "\n", _addr);
+        hw_error("usb_synopsys: bad ep write offset 0x" HWADDR_FMT_plx "\n", _addr);
 		break;
     }
 }
diff --git a/hw/intc/pl192.c b/hw/intc/pl192.c
index 06e61725d4..911abc0615 100644
--- a/hw/intc/pl192.c
+++ b/hw/intc/pl192.c
@@ -208,7 +208,7 @@ static uint64_t pl192_read(void *opaque, hwaddr offset, unsigned size)
     PL192State *s = (PL192State *) opaque;
 
     if (offset & 3) {
-        fprintf(stderr, "pl192: bad read offset (1) " TARGET_FMT_plx "\n", offset);
+        fprintf(stderr, "pl192: bad read offset (1) " HWADDR_FMT_plx "\n", offset);
         return 0;
     }
 
@@ -247,7 +247,7 @@ static uint64_t pl192_read(void *opaque, hwaddr offset, unsigned size)
 			return 0;
         case PL192_SOFTINTCLEAR:
             fprintf(stderr, "pl192: attempt to read write-only register (offset = "
-                     TARGET_FMT_plx ")\n", offset);
+                     HWADDR_FMT_plx ")\n", offset);
         case PL192_VECTADDR:
             return pl192_irq_ack(s);
         /* Workaround for kernel code using PL190 */
@@ -256,7 +256,7 @@ static uint64_t pl192_read(void *opaque, hwaddr offset, unsigned size)
         case PL190_DEFVECTADDR:
             return 0;
         default:
-            fprintf(stderr, "pl192: bad read offset (2) " TARGET_FMT_plx "\n", offset);
+            fprintf(stderr, "pl192: bad read offset (2) " HWADDR_FMT_plx "\n", offset);
             return 0;
     }
 }
@@ -266,12 +266,12 @@ static void pl192_write(void *opaque, hwaddr offset, uint64_t value, unsigned si
     PL192State *s = (PL192State *) opaque;
 
     if (offset & 3) {
-        hw_error("pl192: bad write offset (1) " TARGET_FMT_plx "\n", offset);
+        hw_error("pl192: bad write offset (1) " HWADDR_FMT_plx "\n", offset);
     }
 
     if (offset >= 0xfe0 && offset < 0x1000) {
         hw_error("pl192: attempt to write to a read-only register (offset = "
-                 TARGET_FMT_plx ")\n", offset);
+                 HWADDR_FMT_plx ")\n", offset);
     }
     if (offset >= 0x100 && offset < 0x180) {
         s->vect_addr[(offset - 0x100) >> 2] = value;
@@ -292,7 +292,7 @@ static void pl192_write(void *opaque, hwaddr offset, uint64_t value, unsigned si
         case PL192_FIQSTATUS:
         case PL192_RAWINTR:
             hw_error("pl192: attempt to write to a read-only register (offset = "
-                     TARGET_FMT_plx ")\n", offset);
+                     HWADDR_FMT_plx ")\n", offset);
             break;
         case PL192_INTSELECT:
             s->intselect = value;
@@ -329,7 +329,7 @@ static void pl192_write(void *opaque, hwaddr offset, uint64_t value, unsigned si
             /* Ignore written value */
             return;
         default:
-            fprintf(stderr, "pl192: bad write offset (2) " TARGET_FMT_plx "\n", offset);
+            fprintf(stderr, "pl192: bad write offset (2) " HWADDR_FMT_plx "\n", offset);
             return;
     }